| /Documentation/devicetree/bindings/iio/adc/ |
| D | samsung,exynos-adc.txt | 3 The devicetree bindings are for the new ADC driver written for
7 1. Supports ADC IF found on EXYNOS4412/EXYNOS5250
9 2. Add ADC driver under iio/adc framework
13 - compatible: Must be "samsung,exynos-adc-v1"
15 Must be "samsung,exynos-adc-v2" for
17 Must be "samsung,exynos3250-adc" for
18 controllers compatible with ADC of Exynos3250.
19 Must be "samsung,exynos4212-adc" for
20 controllers compatible with ADC of Exynos4212 and Exynos4412.
21 Must be "samsung,exynos7-adc" for
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| D | at91_adc.txt | 1 * AT91's Analog to Digital Converter (ADC)
4 - compatible: Should be "atmel,<chip>-adc"
6 - reg: Should contain ADC registers location and length
7 - interrupts: Should contain the IRQ line for the ADC
11 - atmel,adc-channels-used: Bitmask of the channels muxed and enabled for this
13 - atmel,adc-startup-time: Startup Time of the ADC in microseconds as
15 - atmel,adc-vref: Reference voltage in millivolts for the conversions
16 - atmel,adc-res: List of resolutions in bits supported by the ADC. List size
18 - atmel,adc-res-names: Contains one identifier string for each resolution
19 in atmel,adc-res property. "lowres" and "highres"
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| D | st,stm32-adc.txt | 1 STMicroelectronics STM32 ADC device driver
3 STM32 ADC is a successive approximation analog-to-digital converter.
5 in single, continuous, scan or discontinuous mode. Result of the ADC is
12 Each STM32 ADC block can have up to 3 ADC instances.
21 Contents of a stm32 adc root node:
25 "st,stm32f4-adc-core"
26 "st,stm32h7-adc-core"
27 "st,stm32mp1-adc-core"
28 - reg: Offset and length of the ADC block register set.
29 - interrupts: One or more interrupts for ADC block. Some parts like stm32f4
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| D | ingenic,adc.txt | 1 * Ingenic JZ47xx ADC controller IIO bindings
6 * ingenic,jz4725b-adc
7 * ingenic,jz4740-adc
8 - reg: ADC controller registers location and length.
9 - clocks: phandle to the SoC's ADC clock.
10 - clock-names: Must be set to "adc".
14 ADC clients must use the format described in iio-bindings.txt, giving
15 a phandle and IIO specifier pair ("io-channels") to the ADC controller.
19 #include <dt-bindings/iio/adc/ingenic,adc.h>
21 adc: adc@10070000 {
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| D | nuvoton,npcm-adc.txt | 1 Nuvoton NPCM Analog to Digital Converter (ADC)
3 The NPCM ADC is a 10-bit converter for eight channel inputs.
6 - compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC.
8 - interrupts: Contain the ADC interrupt with flags for falling edge.
11 - clocks: phandle of ADC reference clock, in case the clock is not
12 added the ADC will use the default ADC sample rate.
13 - vref-supply: The regulator supply ADC reference voltage, in case the
14 vref-supply is not added the ADC will use internal voltage
19 adc: adc@f000c000 {
20 compatible = "nuvoton,npcm750-adc";
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| D | cc10001_adc.txt | 1 * Cosmic Circuits - Analog to Digital Converter (CC-10001-ADC)
4 - compatible: Should be "cosmic,10001-adc"
5 - reg: Should contain adc registers location and length.
6 - clock-names: Should contain "adc".
8 - vref-supply: The regulator supply ADC reference voltage.
11 - adc-reserved-channels: Bitmask of reserved channels,
15 adc: adc@18101600 {
16 compatible = "cosmic,10001-adc";
18 adc-reserved-channels = <0x2>;
20 clock-names = "adc";
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| D | berlin2_adc.txt | 1 * Berlin Analog to Digital Converter (ADC)
3 The Berlin ADC has 8 channels, with one connected to a temperature sensor.
4 It is part of the system controller register set. The ADC node should be a
8 - compatible: must be "marvell,berlin2-adc"
9 - interrupts: the interrupts for the ADC and the temperature sensor
10 - interrupt-names: should be "adc" and "tsen"
14 adc: adc {
15 compatible = "marvell,berlin2-adc";
18 interrupt-names = "adc", "tsen";
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| D | imx7d-adc.txt | 1 Freescale imx7d ADC bindings
3 The devicetree bindings are for the ADC driver written for
7 - compatible: Should be "fsl,imx7d-adc"
8 - reg: Offset and length of the register set for the ADC device
9 - interrupts: The interrupt number for the ADC device
10 - clocks: The root clock of the ADC controller
11 - clock-names: Must contain "adc", matching entry in the clocks property
12 - vref-supply: The regulator supply ADC reference voltage
16 adc1: adc@30610000 {
17 compatible = "fsl,imx7d-adc";
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| D | qcom,pm8xxx-xoadc.txt | 3 The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal
4 oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921.
9 "qcom,pm8018-adc"
10 "qcom,pm8038-adc"
11 "qcom,pm8058-adc"
12 "qcom,pm8921-adc"
14 - reg: should contain the ADC base address in the PMIC, typically
23 ADC has a special addressing scheme that require two cells for
24 identifying each ADC channel:
39 and reference the proper ADC interrupt.
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| D | brcm,iproc-static-adc.txt | 1 * Broadcom's IPROC Static ADC controller
3 Broadcom iProc ADC controller has 8 channels 10bit ADC.
8 - compatible: Must be "brcm,iproc-static-adc"
10 - adc-syscon: Handler of syscon node defining physical base address of the
13 - #io-channel-cells = <1>; As ADC has multiple outputs
28 compatible = "brcm,iproc-ts-adc-syscon","syscon";
32 adc: adc@180a6000 {
33 compatible = "brcm,iproc-static-adc";
34 adc-syscon = <&ts_adc_syscon>;
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| D | fsl,imx25-gcq.txt | 1 Freescale i.MX25 ADC GCQ device
4 analog inputs using the ADC unit of the i.MX25.
15 - vref-ext-supply: The regulator supplying the ADC reference voltage.
17 - vref-xp-supply: The regulator supplying the ADC reference voltage on pin XP.
19 - vref-yp-supply: The regulator supplying the ADC reference voltage on pin YP.
37 - fsl,adc-refp: specifies the positive reference input as defined in
38 <dt-bindings/iio/adc/fsl-imx25-gcq.h>
39 - fsl,adc-refn: specifies the negative reference input as defined in
40 <dt-bindings/iio/adc/fsl-imx25-gcq.h>
44 adc: adc@50030800 {
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| D | lpc1850-adc.txt | 1 NXP LPC1850 ADC bindings
4 - compatible: Should be "nxp,lpc1850-adc"
5 - reg: Offset and length of the register set for the ADC device
6 - interrupts: The interrupt number for the ADC device
7 - clocks: The root clock of the ADC controller
8 - vref-supply: The regulator supply ADC reference voltage
13 adc0: adc@400e3000 {
14 compatible = "nxp,lpc1850-adc";
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| D | sprd,sc27xx-adc.txt | 1 Spreadtrum SC27XX series PMICs ADC binding
5 "sprd,sc2720-adc"
6 "sprd,sc2721-adc"
7 "sprd,sc2723-adc"
8 "sprd,sc2730-adc"
9 "sprd,sc2731-adc"
10 - reg: The address offset of ADC controller.
12 - interrupts: The interrupt number for the ADC device.
30 pmic_adc: adc@480 {
31 compatible = "sprd,sc2731-adc";
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| D | stmpe-adc.txt | 1 STMPE ADC driver
5 - compatible: "st,stmpe-adc"
8 Note that the ADC is shared with the STMPE touchscreen. ADC related settings
10 - st,norequest-mask: bitmask specifying which ADC channels should _not_ be
19 compatible = "st,stmpe-adc";
20 st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */
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| D | st,stm32-dfsdm-adc.txt | 1 STMicroelectronics STM32 DFSDM ADC device driver
4 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
47 "st,stm32-dfsdm-adc" for sigma delta ADCs
52 - st,adc-channels: List of single-ended channels muxed for this ADC.
55 - st,adc-channel-names: List of single-ended channel names.
62 Required properties for "st,stm32-dfsdm-adc" compatibility:
64 modulator or internal ADC output to DFSDM channel.
75 - st,adc-channel-types: Single-ended channel input type.
80 - st,adc-channel-clk-src: Conversion clock source.
86 - st,adc-alt-channel: Must be defined if two sigma delta modulator are
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| D | vf610-adc.txt | 3 The devicetree bindings are for the new ADC driver written for
7 - compatible: Should contain "fsl,vf610-adc"
10 - clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock.
11 - clock-names: Must contain "adc", matching entry in the clocks property.
12 - vref-supply: The regulator supply ADC reference voltage.
27 adc0: adc@4003b000 {
28 compatible = "fsl,vf610-adc";
32 clock-names = "adc";
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| D | axp20x_adc.txt | 1 * X-Powers AXP ADC bindings
5 - "x-powers,axp209-adc",
6 - "x-powers,axp221-adc",
7 - "x-powers,axp813-adc",
13 adc {
14 compatible = "x-powers,axp221-adc";
19 ADC channels and their indexes per variant:
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| D | cpcap-adc.txt | 1 Motorola CPCAP PMIC ADC binding
4 - compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc"
5 - interrupts: The interrupt number for the ADC device
11 cpcap_adc: adc {
12 compatible = "motorola,mapphone-cpcap-adc";
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| D | lpc32xx-adc.txt | 1 * NXP LPC32xx SoC ADC controller
4 - compatible: must be "nxp,lpc3220-adc"
7 - interrupts: The ADC interrupt
10 - vref-supply: The regulator supply ADC reference voltage, optional
15 adc@40048000 {
16 compatible = "nxp,lpc3220-adc";
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | resistive-adc-touch.txt | 1 Generic resistive touchscreen ADC
5 - compatible: must be "resistive-adc-touch"
6 The device must be connected to an ADC device that provides channels for
9 - iio-channels: must have at least two channels connected to an ADC device.
10 These should correspond to the channels exposed by the ADC device and should
11 have the right index as the ADC device registers them. These channels
18 used if the ADC device also measures pressure besides position.
26 compatible = "resistive-adc-touch";
28 io-channels = <&adc 24>, <&adc 25>, <&adc 26>;
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| D | ti-tsc-adc.txt | 1 * TI - TSC ADC (Touschscreen and analog digital converter)
22 remaining 4 can be used by the ADC.
32 - child "adc"
34 "ti,am3359-adc" for AM335x/AM437x SoCs
35 "ti,am654-adc", "ti,am3359-adc" for AM654 SoCs
36 ti,adc-channels: List of analog inputs available for ADC.
42 ADC clock cycles. Charge delay value should be large
53 - child "adc"
55 ADC in the order of ti,adc-channels. The
56 value corresponds to the number of ADC
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| D | stmpe.txt | 38 - st,sample-time : ADC conversion time in number of clock.
46 - st,mod-12b : ADC Bit mode
47 0 -> 10bit ADC
48 1 -> 12bit ADC
49 - st,ref-sel : ADC reference source
52 - st,adc-freq : ADC Clock speed
60 Note that common ADC settings of stmpe_touchscreen (child) will take precedence
78 /* Common ADC settings */
79 /* 3.25 MHz ADC clock speed */
80 st,adc-freq = <1>;
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| /Documentation/devicetree/bindings/iio/ |
| D | iio-bindings.txt | 23 adc: voltage-sensor@35 {
31 adc@35 {
32 compatible = "some-vendor,some-adc";
67 io-channels = <&adc 1>, <&ref 0>;
72 The vcc channel is connected to output 1 of the &adc device, and the
77 adc: max1139@35 {
87 io-channels = <&adc 0>, <&adc 1>, <&adc 2>,
88 <&adc 3>, <&adc 4>, <&adc 5>,
89 <&adc 6>, <&adc 7>, <&adc 8>,
90 <&adc 9>;
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| /Documentation/devicetree/bindings/mfd/ |
| D | stmpe.txt | 4 keypad, touchscreen, adc, pwm, rotator.
17 Optional properties for devices with touch and ADC (STMPE811|STMPE610):
18 - st,sample-time : ADC conversion time in number of clock.
23 - st,mod-12b : ADC Bit mode
24 0 -> 10bit ADC 1 -> 12bit ADC
25 - st,ref-sel : ADC reference source
27 - st,adc-freq : ADC Clock speed
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| /Documentation/hwmon/ |
| D | da9055.rst | 16 The DA9055 provides an Analogue to Digital Converter (ADC) with 10 bits
20 the input of the ADC during the conversion.
22 The ADC is used to measure the following inputs:
37 are stored in a 10 bit ADC.
41 Milli volt = ((ADC value * 1000) / 85) + 2500
43 The voltages on ADC channels 1, 2 and 3 are calculated as:
45 Milli volt = (ADC value * 1000) / 102
50 Temperatures are sampled by a 10 bit ADC. Junction temperatures
51 are monitored by the ADC channels.
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