Searched +full:armv7 +full:- +full:timer (Results 1 – 3 of 3) sorted by relevance
| /Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM architected timer 10 - Marc Zyngier <marc.zyngier@arm.com> 11 - Mark Rutland <mark.rutland@arm.com> 13 ARM cores may have a per-core architected timer, which provides per-cpu timers, 14 or a memory mapped architected timer, which provides up to 8 frames with a 15 physical and optional virtual timer per frame. [all …]
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| D | arm,arch_timer_mmio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM memory mapped architected timer 10 - Marc Zyngier <marc.zyngier@arm.com> 11 - Mark Rutland <mark.rutland@arm.com> 14 ARM cores may have a memory mapped architected timer, which provides up to 8 15 frames with a physical and optional virtual timer per frame. 17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs. [all …]
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| D | arm,armv7m-systick.txt | 1 * ARMv7M System Timer 3 ARMv7-M includes a system timer, known as SysTick. Current driver only 7 - compatible : Should be "arm,armv7m-systick" 8 - reg : The address range of the timer 11 - clocks : The input clock of the timer 12 - clock-frequency : The rate in HZ in input of the ARM SysTick 16 systick: timer@e000e010 { 17 compatible = "arm,armv7m-systick"; 22 systick: timer@e000e010 { 23 compatible = "arm,armv7m-systick"; [all …]
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