Searched full:asserted (Results 1 – 25 of 63) sorted by relevance
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| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 46 If omitted it will be asserted with data.
56 - nvidia,snor-muxed-width: Number of cycles MUX address/data asserted on the
58 - nvidia,snor-hold-width: Number of cycles CE stays asserted after the
61 - nvidia,snor-adv-width: Number of cycles during which ADV stays asserted.
63 - nvidia,snor-ce-width: Number of cycles before CE is asserted.
65 - nvidia,snor-we-width: Number of cycles during which WE stays asserted.
67 - nvidia,snor-oe-width: Number of cycles during which OE stays asserted.
69 - nvidia,snor-wait-width: Number of cycles before READY is asserted.
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| D | qcom,ebi2.txt | 78 drive the data bus after OE is de-asserted, in order to avoid contention on
84 WE is asserted until CS is asserted. With a hold of 1 (value = 0), the CS
100 assertion, with respect to the cycle where ADV (address valid) is asserted.
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| /Documentation/devicetree/bindings/input/ |
| D | gpio-keys.txt | 30 system when asserted, when deasserted, or both. This property is
34 EV_ACT_ASSERTED - asserted
36 EV_ACT_ANY - both asserted and deasserted
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7780.yaml | 47 specified, it will be asserted during driver probe. As the
54 the ad778x chips. If specified, it will be asserted during
62 for the ad778x chips. If specified, it will be asserted
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| D | adi,ad7768-1.txt | 23 - reset-gpios : GPIO spec for the RESET pin. If specified, it will be asserted during
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| /Documentation/devicetree/bindings/mmc/ |
| D | mmc-pwrseq-simple.txt | 11 - reset-gpios : contains a list of GPIO specifiers. The reset GPIOs are asserted
13 They will be de-asserted right after the power has been provided to the
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| D | mmc-pwrseq-emmc.txt | 15 - reset-gpios : contains a GPIO specifier. The reset GPIO is asserted
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| /Documentation/devicetree/bindings/pci/ |
| D | xilinx-nwl-pcie.txt | 18 "msi1, msi0": interrupt asserted when an MSI is received
19 "intx": interrupt asserted when a legacy interrupt is received
20 "misc": interrupt asserted when miscellaneous interrupt is received
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| D | axis,artpec6-pcie.txt | 20 - "msi": The interrupt that is asserted when an MSI is received
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| /Documentation/devicetree/bindings/reset/ |
| D | st,sti-powerdown.txt | 10 The actual action taken when powerdown is asserted is hardware dependent.
11 However, when asserted it may not be possible to access the hardware's
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| D | st,sti-softreset.txt | 9 The actual action taken when softreset is asserted is hardware dependent.
10 However, when asserted it may not be possible to access the hardware's
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| D | st,sti-picophyreset.txt | 8 The actual action taken when softreset is asserted is hardware dependent.
9 However, when asserted it may not be possible to access the hardware's
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| D | img,pistachio-reset.txt | 8 The actual action taken when soft reset is asserted is hardware dependent.
9 However, when asserted it may not be possible to access the hardware's
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| /Documentation/hwmon/ |
| D | adm9240.rst | 90 Temperature alarm is asserted once the temperature exceeds the high limit,
114 - low speed alarm will be asserted if fan speed is
127 - alarm will be asserted
161 An alarm is asserted for any voltage going below or above the set limits.
172 An alarm is asserted when the CI pin goes active high. The ADM9240
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| D | lm93.rst | 103 signals. I.e. when #P1_PROCHOT is asserted, the LM93 will automatically
124 which 1 indicates #VRD_HOT is asserted and 0 indicates it is negated. These
254 If the #PROCHOT or #VRDHOT signals are asserted while bound to a PWM output
298 vrdhot<n> 0 means negated, 1 means asserted
303 pwm_auto_prochot_ramp ramp time per step when #PROCHOT asserted
304 pwm_auto_vrdhot_ramp ramp time per step when #VRDHOT asserted
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mt6797.txt | 53 duty cycle when asserted (high pulse width adjustment). Valid arguments
56 duty cycle when asserted (high pulse width adjustment). Valid arguments
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| D | pinctrl-mt8183.txt | 56 duty cycle when asserted (high pulse width adjustment). Valid arguments
59 duty cycle when asserted (high pulse width adjustment). Valid arguments
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| /Documentation/devicetree/bindings/misc/ |
| D | eeprom-93xx46.txt | 11 - select-gpios : if present, specifies the GPIO that will be asserted prior to
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| /Documentation/devicetree/bindings/usb/ |
| D | qcom,dwc3.txt | 40 - "hs_phy_irq": The interrupt that is asserted when a
42 - "ss_phy_irq": The interrupt that is asserted when a
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | mvebu-devbus.txt | 64 DEV_OEn and DEV_CSn are asserted at the same cycle.
73 DEV_OEn and DEV_CSn are de-asserted at the same cycle
76 DEV_OEn is always de-asserted the next cycle after
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| /Documentation/devicetree/bindings/power/supply/ |
| D | lt3651-charger.txt | 14 GPIO reports "active" when the output is asserted, so if the pins have been
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| /Documentation/firmware-guide/acpi/ |
| D | lpit.rst | 31 residency, or system time spent with the SLP_S0# signal asserted.
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| /Documentation/devicetree/bindings/sound/ |
| D | cs4271.txt | 25 line is de-asserted. That also means that clocks cannot be changed
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| /Documentation/devicetree/bindings/regulator/ |
| D | tps65132-regulator.txt | 22 asserted for during active discharge, in microseconds.
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| /Documentation/devicetree/bindings/mtd/ |
| D | fsmc-nand.txt | 30 command is asserted. Zero means one cycle, 255 means 256
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