Home
last modified time | relevance | path

Searched full:assumed (Results 1 – 25 of 161) sorted by relevance

1234567

/Documentation/devicetree/bindings/net/can/
Dfsl-flexcan.txt23 device tree node then controller is assumed to be little endian.
24 if this property is present then controller is assumed to be big
/Documentation/devicetree/bindings/display/bridge/
Dti,tfp410.txt23 - If pclk-sample is not defined, pclk-sample = 0 should be assumed for
25 - If bus-width is not defined then bus-width = 24 should be assumed for
/Documentation/devicetree/bindings/sound/
Dadi,adau7002.txt12 If this property is not present it is assumed that the supply pin is
Dtscs454.txt13 Note: If clock is not provided then bit clock is assumed
Dssm2518.txt12 assumed that the nSD pin is hardwired to always on.
Deverest,es7241.txt16 If this property is not provided, sdout is assumed to pulled
Dqcom,msm8916-wcd-analog.txt44 its assumed that hphl pin on jack is NC
48 its assumed that gnd pin on jack is NC
/Documentation/devicetree/bindings/i2c/
Di2c-rk3x.txt37 (t(r) in I2C specification). If not specified this is assumed to be
41 (t(f) in the I2C specification). If not specified this is assumed to
/Documentation/media/uapi/v4l/
Dselection-api-examples.rst14 (A video capture device is assumed; change
64 A video output device is assumed; change ``V4L2_BUF_TYPE_VIDEO_OUTPUT``
/Documentation/devicetree/bindings/net/
Dlpc-eth.txt10 absent, "rmii" is assumed.
Dftgmac100.txt18 absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
/Documentation/ABI/testing/
Dsysfs-bus-iio-frequency-adf43507 the fractional-N PLL. It is assumed that the algorithm
/Documentation/devicetree/bindings/regulator/
Dpwm-regulator.txt39 defined, <100> is assumed, meaning that
47 If not defined, <0 100> is assumed.
/Documentation/devicetree/bindings/spi/
Dspi-clps711x.txt14 which is assumed to be in the same device tree, with and marked
/Documentation/devicetree/bindings/display/panel/
Dsharp,lq150x1lg11.txt13 pins are assumed to be handled appropriately by the hardware.
/Documentation/devicetree/bindings/ufs/
Dufshcd-pltfrm.txt47 defined or a value in the array is "0" then it is assumed
60 Note: If above properties are not defined it can be assumed that the supply
Dufs-mediatek.txt21 defined or a value in the array is "0" then it is assumed
/Documentation/devicetree/bindings/input/
Dqcom,pm8941-pwrkey.txt42 When property is omitted KEY_POWER is assumed.
/Documentation/hwmon/
Dg760a.rst24 cycle counts of an assumed 32kHz clock source.
/Documentation/devicetree/bindings/serial/
Drs485.txt14 If this property is not specified, <0 0> is assumed.
/Documentation/devicetree/bindings/iio/adc/
Dti-adc12138.txt18 If not specified, this is assumed to be analog ground.
/Documentation/devicetree/bindings/iio/dac/
Ddpot-dac.txt3 It is assumed that the dpot is used as a voltage divider between the
/Documentation/devicetree/bindings/media/i2c/
Dtvp5150.txt27 the endpoint is assumed to use embedded BT.656 synchronization.
/Documentation/devicetree/bindings/iio/light/
Dcm3605.txt28 calibration curves for. If not supplied, 100 kOhm will be assumed
/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,archs-idu-intc.txt23 When no second cell is specified, the interrupt is assumed to be level

1234567