Searched full:byte (Results 1 – 25 of 397) sorted by relevance
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| /Documentation/scsi/ |
| D | arcmsr_spec.txt | 24 ** Currently 128 byte buffer is used 26 ** Byte 4--127 : Max 124 bytes of data 96 ** byte 0 : 0xaa <-- signature 97 ** byte 1 : 0x55 <-- signature 98 ** byte 2 : year (04) 99 ** byte 3 : month (1..12) 100 ** byte 4 : date (1..31) 101 ** byte 5 : hour (0..23) 102 ** byte 6 : minute (0..59) 103 ** byte 7 : second (0..59) [all …]
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| /Documentation/input/devices/ |
| D | alps.rst | 33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s 52 one-byte device registers in a 16-bit address space. The command sequence 54 with 88-07 followed by a third byte. This third byte can be used to determine 76 sequences for the "Dolphin" touchpads as determined by the second byte 94 byte 0: 0 0 YSGN XSGN 1 M R L 95 byte 1: X7 X6 X5 X4 X3 X2 X1 X0 96 byte 2: Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 109 byte 0: 1 0 0 0 1 x9 x8 x7 110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0 111 byte 2: 0 ? ? l r ? fin ges [all …]
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| D | elantech.rst | 20 4.2 Native relative mode 4 byte packet format 21 4.3 Native absolute mode 4 byte packet format 24 5.2 Native absolute mode 6 byte packet format 30 6.2 Native absolute mode 6 byte packet format 35 7.2 Native absolute mode 6 byte packet format 41 8.2 Native relative mode 6 byte packet format 188 A: 1 = absolute mode (needs 4 byte packets, see reg_11) 201 F: 1 = enable native 4 byte packet mode 235 Native relative mode 4 byte packet format 238 byte 0:: [all …]
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| D | sentelic.rst | 28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| 32 Byte 1: Bit7 => Y overflow 40 Byte 2: X Movement(9-bit 2's complement integers) 41 Byte 3: Y Movement(9-bit 2's complement integers) 42 Byte 4: Bit3~Bit0 => the scrolling wheel's movement since the last data report. 60 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| 64 Byte 1: Bit7 => Y overflow 72 Byte 2: X Movement(9-bit 2's complement integers) 73 Byte 3: Y Movement(9-bit 2's complement integers) 74 Byte 4: Bit0 => the Vertical scrolling movement downward. [all …]
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| /Documentation/EDID/ |
| D | edid.S | 62 header: .byte 0x00,0xff,0xff,0xff,0xff,0xff,0xff,0x00 72 week: .byte WEEK 76 year: .byte YEAR-1990 78 version: .byte VERSION /* EDID version, usually 1 (for 1.3) */ 79 revision: .byte REVISION /* EDID revision, usually 3 (for 1.3) */ 95 video_parms: .byte 0x6d 99 max_hor_size: .byte xsize/10 102 If either byte is 0, undefined (e.g. projector) */ 103 max_vert_size: .byte ysize/10 106 gamma: .byte 120 [all …]
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| /Documentation/driver-api/ |
| D | mtdnand.rst | 365 Hardware ECC generator providing 3 bytes ECC per 256 byte. 369 Hardware ECC generator providing 3 bytes ECC per 512 byte. 373 Hardware ECC generator providing 6 bytes ECC per 512 byte. 377 Hardware ECC generator providing 8 bytes ECC per 512 byte. 643 The eccpos array holds the byte offsets in the spare area where the 691 256 byte pagesize 697 0x00 ECC byte 0 Error correction code byte 0 698 0x01 ECC byte 1 Error correction code byte 1 699 0x02 ECC byte 2 Error correction code byte 2 702 0x05 Bad block marker If any bit in this byte is zero, then this [all …]
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| /Documentation/i2c/ |
| D | smbus-protocol.rst | 24 single data byte, the functions using SMBus protocol operation names execute 44 Comm (8 bits): Command byte, a data byte which often selects a register on 46 Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh 48 Count (8 bits): A data byte containing the length of a block operation. 65 SMBus Receive Byte: i2c_smbus_read_byte() 68 This reads a single byte from a device, without specifying a device 78 SMBus Send Byte: i2c_smbus_write_byte() 81 This operation is the reverse of Receive Byte: it sends a single byte 82 to a device. See Receive Byte for more information. 91 SMBus Read Byte: i2c_smbus_read_byte_data() [all …]
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| D | slave-interface.rst | 63 types described hereafter. 'val' holds an u8 value for the data byte to be 84 'val': backend returns first byte to be sent 90 should transmit the first byte. 94 'val': bus driver delivers received byte 96 'ret': 0 if the byte should be acked, some errno if the byte should be nacked 98 Another I2C master has sent a byte to us which needs to be set in 'val'. If 'ret' 99 is zero, the bus driver should ack this byte. If 'ret' is an errno, then the byte 104 'val': backend returns next byte to be sent 108 The bus driver requests the next byte to be sent to another I2C master in 109 'val'. Important: This does not mean that the previous byte has been acked, it [all …]
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| D | i2c-stub.rst | 9 types of SMBus commands: write quick, (r/w) byte, (r/w) byte data, (r/w) 21 A pointer register with auto-increment is implemented for all byte 22 operations. This allows for continuous byte reads like those supported by 52 value 0x1f0000 would only enable the quick, byte and byte data 62 If your target driver polls some byte or word waiting for it to change, the
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| /Documentation/ |
| D | lzo.txt | 35 The first byte of the block follows a different encoding from other bytes, it 37 prior to that byte. 42 rate of at most 255 per extra byte (thus the compression ratio cannot exceed 45 length = byte & ((1 << #bits) - 1) 49 length += first-non-zero-byte 56 Certain encodings involve one extra byte, others involve two extra bytes 95 Byte sequences 98 First byte encoding:: 105 17 : bitstream version. If the first byte is 17, and compressed 107 versioned bitstream), the next byte gives the bitstream version [all …]
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| /Documentation/hid/ |
| D | hid-alps.rst | 22 Byte Field Value Notes 74 Byte1 Command Byte 75 Byte2 Address - Byte 0 (LSB) 76 Byte3 Address - Byte 1 77 Byte4 Address - Byte 2 78 Byte5 Address - Byte 3 (MSB) 79 Byte6 Value Byte 83 Command Byte is read=0xD1/write=0xD2 . 87 Value Byte is writing data when you send the write commands. 94 Byte1 Response Byte [all …]
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| D | hidraw.rst | 50 On a device which uses numbered reports, the first byte of the returned data 52 byte. For devices which do not use numbered reports, the report data 53 will begin at the first byte. 62 The first byte of the buffer passed to write() should be set to the report 63 number. If the device does not use numbered reports, the first byte should 64 be set to 0. The report data itself should begin at the second byte. 115 Set the first byte of the supplied buffer to the report number. For devices 116 which do not use numbered reports, set the first byte to 0. The report data 117 begins in the second byte. Make sure to set len accordingly, to one more 124 endpoint. The first byte of the supplied buffer should be set to the report [all …]
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| /Documentation/devicetree/bindings/mtd/ |
| D | fsmc-nand.txt | 11 defaults to 1 byte 15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits 18 byte 1 TAR : ALE to RE delay, 4 bits are valid. Same format as TCLR. 19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is 23 byte 3 THOLD : number of HCLK clock cycles to hold the address (and data 26 byte 4 TWAIT : number of HCLK clock cycles to assert the command to the 29 byte 5 TSET : number of HCLK clock cycles to assert the address before the
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| /Documentation/hwmon/ |
| D | abituguru-datasheet.rst | 117 Then for each byte of data you want to read wait for DATA to hold 0x01 119 DATA holds 0x01 read the byte from CMD. 136 Then for each byte of data you want to write wait for DATA to hold 0x00 138 once DATA holds 0x00 write the byte to CMD. 171 Byte 0: 172 This byte holds the alarm flags for sensor 0-7 of Sensor Bank1, with bit 0 175 Byte 1: 176 This byte holds the alarm flags for sensor 8-15 of Sensor Bank1, with bit 0 179 Byte 2: 180 This byte holds the alarm flags for sensor 0-5 of Sensor Bank2, with bit 0 [all …]
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| /Documentation/networking/ |
| D | x25-iface.txt | 16 over the LAPB link. The first byte of the skbuff indicates the meaning of 23 First Byte = 0x00 (X25_IFACE_DATA) 29 First Byte = 0x01 (X25_IFACE_CONNECT) 34 First Byte = 0x02 (X25_IFACE_DISCONNECT) 39 First Byte = 0x03 (X25_IFACE_PARAMS) 47 First Byte = 0x00 (X25_IFACE_DATA) 52 First Byte = 0x01 (X25_IFACE_CONNECT) 57 First Byte = 0x02 (X25_IFACE_DISCONNECT) 62 First Byte = 0x03 (X25_IFACE_PARAMS)
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| /Documentation/media/uapi/v4l/ |
| D | pixfmt-sdr-pcu20be.rst | 30 **Byte Order.** 31 Each cell is one byte. 38 - Byte B0 39 - Byte B1 40 - Byte B2 41 - Byte B3
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| D | pixfmt-sdr-pcu18be.rst | 30 **Byte Order.** 31 Each cell is one byte. 38 - Byte B0 39 - Byte B1 40 - Byte B2 41 - Byte B3
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| D | pixfmt-sdr-pcu16be.rst | 30 **Byte Order.** 31 Each cell is one byte. 38 - Byte B0 39 - Byte B1 40 - Byte B2 41 - Byte B3
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| /Documentation/media/uapi/cec/ |
| D | cec-pin-error-inj.rst | 52 # <op>[,<mode>] rx-add-byte add a spurious byte to the received CEC message 53 # <op>[,<mode>] rx-remove-byte remove the last byte from the received CEC message 64 # <op>[,<mode>] tx-early-eom set the EOM bit one byte too soon 66 # <op>[,<mode>] tx-remove-byte drop the last byte from the message 79 # 10 bits per 'byte': bits 0-7: data, bit 8: EOM, bit 9: ACK 162 Every byte of the message will be NACKed in case the transmitter 163 keeps transmitting after the first byte was NACKed. 174 ``<op>[,<mode>] rx-add-byte`` 175 Add a spurious 0x55 byte to the received CEC message, provided 179 ``<op>[,<mode>] rx-remove-byte`` [all …]
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| /Documentation/i2c/busses/ |
| D | i2c-taos-evm.rst | 39 * Receive Byte 40 * Send Byte 41 * Read Byte 42 * Write Byte
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| /Documentation/core-api/ |
| D | packing.rst | 23 were performed byte-by-byte. Also the code can easily get cluttered, and the 44 perspective, bit 63 always means bit offset 7 of byte 7, albeit only 48 The byte offsets in the packed buffer are always implicitly 0, 1, ... 7. 76 That is, QUIRK_MSB_ON_THE_RIGHT does not affect byte positioning, but 77 inverts bit offsets inside a byte. 90 byte from each 4-byte word is placed at its mirrored position compared to 113 In this case the 8 byte memory region is interpreted as follows: first 114 4 bytes correspond to the least significant 4-byte word, next 4 bytes to 115 the more significant 4-byte word.
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| /Documentation/arm/samsung-s3c24xx/ |
| D | nand.rst | 11 The driver uses a 512 byte (1 page) ECC code for this setup. The 21 Unlike the 512byte page mode, the driver generates ECC data for 22 each 256 byte block in an 2KiB page. This means that more than
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| /Documentation/sparc/oradax/ |
| D | dax-hv-api.txt | 256 0x0 Fixed width byte packed Up to 16 bytes 259 within a byte 260 …0x2 Variable width byte packed Data stream of lengths must be provided as a secon… 262 … 0x4 Fixed width byte packed with run Up to 16 bytes; data stream of run lengths must be 266 … within a byte; data stream of run lengths must be provided 268 … 0x8 Fixed width byte packed with Up to 16 bytes before the encoding; compressed stream 270 … OZIP (CCB version 1) encoding within a byte; pointer to the encoding table must be 274 … OZIP (CCB version 1) encoding least significant bit within a byte; pointer to the encoding 276 … 0xA Variable width byte packed with Up to 16 bytes before the encoding; compressed stream 278 … OZIP (CCB version 1) encoding within a byte; data stream of lengths must be provided as [all …]
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| /Documentation/admin-guide/device-mapper/ |
| D | dm-flakey.rst | 55 The offset of the byte to replace. 56 Counting starts at 1, to replace the first byte. 68 Replaces the 32nd byte of READ bios with the value 1:: 72 Replaces the 224th byte of REQ_META (=32) bios with the value 0::
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-spi-byte.txt | 1 * Single Byte SPI LED Device Driver. 4 - one LED is controlled by a single byte on MOSI 5 - the value of the byte gives the brightness between two values (lowest to
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