Searched full:ccu (Results 1 – 25 of 25) sorted by relevance
| /Documentation/devicetree/bindings/clock/ |
| D | allwinner,sun4i-a10-ccu.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml# 22 - allwinner,sun4i-a10-ccu 23 - allwinner,sun5i-a10s-ccu 24 - allwinner,sun5i-a13-ccu 25 - allwinner,sun6i-a31-ccu 26 - allwinner,sun7i-a20-ccu 27 - allwinner,sun8i-a23-ccu 28 - allwinner,sun8i-a33-ccu 29 - allwinner,sun8i-a83t-ccu 30 - allwinner,sun8i-a83t-r-ccu [all …]
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| D | brcm,kona-ccu.txt | 4 clock control units (CCUs). A CCU is a clock provider that manages 5 a set of clock signals. Each CCU is represented by a node in the 13 Shall have a value of the form "brcm,<model>-<which>-ccu", 15 the name of a defined CCU. For example: 16 "brcm,bcm11351-root-ccu" 27 the clocks provided by the CCU. 32 compatible = "brcm,bcm11351-slave-ccu"; 58 CCU compatible string values for SoCs in the BCM281XX family are: 59 "brcm,bcm11351-root-ccu" 60 "brcm,bcm11351-aon-ccu" [all …]
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| D | lpc1850-ccu.txt | 1 * NXP LPC1850 Clock Control Unit (CCU) 14 Should be "nxp,lpc1850-ccu" 23 from the CGU to the specific CCU. See mapping of base clocks 24 and CCU in table below. 27 from the CGU to the specific CCU. Valid CCU clock names: 35 Which branch clocks that are available on the CCU depends on the 38 A list of CCU clocks can be found in dt-bindings/clock/lpc18xx-ccu.h. 44 compatible = "nxp,lpc1850-ccu"; 58 compatible = "nxp,lpc1850-ccu"; 71 /* A user of CCU brach clocks */
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| D | sun9i-de.txt | 23 clocks = <&ccu CLK_DE>, <&ccu CLK_SDRAM>, <&ccu CLK_BUS_DE>; 25 resets = <&ccu RST_BUS_DE>;
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| D | sun8i-de2.txt | 27 clocks = <&ccu CLK_BUS_DE>, 28 <&ccu CLK_DE>; 31 resets = <&ccu RST_BUS_DE>;
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| D | milbeaut-clock.yaml | 24 - socionext,milbeaut-m10v-ccu 42 compatible = "socionext,milbeaut-m10v-clk-ccu";
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| D | sun9i-usb.txt | 20 clocks = <&ccu CLK_BUS_USB>, <&osc24M>;
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| D | lpc1850-cgu.txt | 123 /* A CGU and CCU clock consumer */
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| /Documentation/devicetree/bindings/media/ |
| D | allwinner,sun4i-a10-csi.yaml | 83 #include <dt-bindings/clock/sun7i-a20-ccu.h> 84 #include <dt-bindings/reset/sun4i-a10-ccu.h> 90 clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; 92 resets = <&ccu RST_CSI0>;
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| D | cedrus.txt | 50 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, 51 <&ccu CLK_DRAM_VE>; 54 resets = <&ccu RST_VE>;
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| D | sun6i-csi.txt | 42 clocks = <&ccu CLK_BUS_CSI>, 43 <&ccu CLK_CSI1_SCLK>, 44 <&ccu CLK_DRAM_CSI>; 46 resets = <&ccu RST_BUS_CSI>;
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| /Documentation/devicetree/bindings/net/ |
| D | allwinner,sun8i-a83t-emac.yaml | 195 resets = <&ccu 12>; 197 clocks = <&ccu 27>; 225 clocks = <&ccu 67>; 226 resets = <&ccu 39>; 246 resets = <&ccu 12>; 248 clocks = <&ccu 27>; 275 clocks = <&ccu 67>; 276 resets = <&ccu 39>; 299 resets = <&ccu 13>; 301 clocks = <&ccu 27>;
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| /Documentation/devicetree/bindings/phy/ |
| D | allwinner,sun6i-a31-mipi-dphy.yaml | 51 clocks = <&ccu 23>, <&ccu 97>; 53 resets = <&ccu 4>;
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| /Documentation/devicetree/bindings/display/ |
| D | allwinner,sun6i-a31-mipi-dsi.yaml | 77 clocks = <&ccu 23>, <&ccu 96>; 79 resets = <&ccu 4>;
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| /Documentation/devicetree/bindings/bus/ |
| D | allwinner,sun50i-a64-de2.yaml | 77 clocks = <&ccu 52>, <&ccu 99>; 79 resets = <&ccu 30>;
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| /Documentation/devicetree/bindings/spi/ |
| D | allwinner,sun6i-a31-spi.yaml | 98 clocks = <&ccu 30>, <&ccu 82>; 102 resets = <&ccu 15>;
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| /Documentation/devicetree/bindings/sound/ |
| D | allwinner,sun8i-a33-codec.yaml | 53 clocks = <&ccu 47>, <&ccu 92>;
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| D | sun4i-codec.txt | 81 clocks = <&ccu CLK_APB1_CODEC>, <&ccu CLK_CODEC>; 83 resets = <&ccu RST_APB1_CODEC>;
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| /Documentation/devicetree/bindings/dma/ |
| D | allwinner,sun50i-a64-dma.yaml | 81 clocks = <&ccu 30>; 84 resets = <&ccu 7>;
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| /Documentation/devicetree/bindings/gpu/ |
| D | arm,mali-utgard.yaml | 163 clocks = <&ccu 1>, <&ccu 2>; 165 resets = <&ccu 1>;
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| /Documentation/devicetree/bindings/opp/ |
| D | sun50i-nvmem-cpufreq.txt | 46 clocks = <&ccu CLK_CPUX>; 57 clocks = <&ccu CLK_CPUX>; 68 clocks = <&ccu CLK_CPUX>; 79 clocks = <&ccu CLK_CPUX>;
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,wcnss-pil.txt | 17 Definition: must specify the base address and size of the CCU, DXE and 23 Definition: must be "ccu", "dxe", "pmu" 105 reg-names = "ccu", "dxe", "pmu";
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,wcnss.txt | 21 Definition: reference to a node specifying the wcnss "ccu" and "dxe" 122 reg-names = "ccu", "dxe", "pmu";
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| /Documentation/devicetree/bindings/arm/sunxi/ |
| D | sunxi-mbus.txt | 26 clocks = <&ccu CLK_MBUS>;
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| /Documentation/devicetree/bindings/display/sunxi/ |
| D | sun4i-drm.txt | 471 clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, 472 <&ccu CLK_PLL_VIDEO0_2X>, 473 <&ccu CLK_PLL_VIDEO1_2X>;
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