Searched +full:clock +full:- +full:mult (Results 1 – 9 of 9) sorted by relevance
| /Documentation/devicetree/bindings/clock/ |
| D | fixed-factor-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-factor-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Binding for simple fixed factor rate clock sources
10 - Michael Turquette <mturquette@baylibre.com>
11 - Stephen Boyd <sboyd@kernel.org>
16 - allwinner,sun4i-a10-pll3-2x-clk
17 - fixed-factor-clock
19 "#clock-cells":
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| D | renesas,emev2-smu.txt | 1 Device tree Clock bindings for Renesas EMMA Mobile EV2
3 This binding uses the common clock binding.
7 This is not a clock provider, but clocks under SMU depend on it.
10 - compatible: Should be "renesas,emev2-smu"
11 - reg: Address and Size of SMU registers
15 "Serial clock generator" in fig."Clock System Overview" of the manual,
17 This makes internal (neither input nor output) clock that is provided
21 - compatible: Should be "renesas,emev2-smu-clkdiv"
22 - reg: Byte offset from SMU base and Bit position in the register
23 - clocks: Parent clocks. Input clocks as described in clock-bindings.txt
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | fixed-factor-clock.txt | 1 Binding for TI fixed factor rate clock sources.
3 Binding status: Unstable - ABI compatibility may be broken in the future
5 This binding uses the common clock binding[1], and also uses the autoidle
6 support from TI autoidle clock [2].
8 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
9 [2] Documentation/devicetree/bindings/clock/ti/autoidle.txt
12 - compatible : shall be "ti,fixed-factor-clock".
13 - #clock-cells : from common clock binding; shall be set to 0.
14 - ti,clock-div: fixed divider.
15 - ti,clock-mult: fixed multiplier.
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| D | autoidle.txt | 1 Binding for Texas Instruments autoidle clock.
3 Binding status: Unstable - ABI compatibility may be broken in the future
5 This binding uses the common clock binding[1]. It assumes a register mapped
6 clock which can be put to idle automatically by hardware based on the usage
7 and a configuration bit setting. Autoidle clock is never an individual
8 clock, it is always a derivative of some basic clock like a gate, divider,
9 or fixed-factor.
11 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
14 - reg : offset for the register controlling the autoidle
15 - ti,autoidle-shift : bit shift of the autoidle enable bit
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| D | dpll.txt | 1 Binding for Texas Instruments DPLL clock.
3 Binding status: Unstable - ABI compatibility may be broken in the future
5 This binding uses the common clock binding[1]. It assumes a
6 register-mapped DPLL with usually two selectable input clocks
7 (reference clock and bypass clock), with digital phase locked
8 loop logic for multiplying the input clock to a desired output
9 clock. This clock also typically supports different operation
11 sub-types, which effectively result in slightly different setup
12 for the actual DPLL clock.
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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| /Documentation/timers/ |
| D | timekeeping.rst | 2 Clock sources, Clock events, sched_clock() and delay timers
10 If you grep through the kernel source you will find a number of architecture-
11 specific implementations of clock sources, clockevents and several likewise
12 architecture-specific overrides of the sched_clock() function and some
15 To provide timekeeping for your platform, the clock source provides
16 the basic timeline, whereas clock events shoot interrupts on certain points
17 on this timeline, providing facilities such as high-resolution timers.
22 Clock sources
23 -------------
25 The purpose of the clock source is to provide a timeline for the system that
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| /Documentation/devicetree/bindings/mfd/ |
| D | sun6i-prcm.txt | 1 * Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device
7 - compatible: "allwinner,sun6i-a31-prcm" or "allwinner,sun8i-a23-prcm"
8 - reg: The PRCM registers range
11 - see Documentation/devicetree/bindings/clock/sunxi.txt for clock devices
12 - see Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt for reset
19 compatible = "allwinner,sun6i-a31-prcm";
24 compatible = "allwinner,sun6i-a31-ar100-clk";
25 #clock-cells = <0>;
30 compatible = "fixed-factor-clock";
31 #clock-cells = <0>;
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| /Documentation/devicetree/bindings/net/ |
| D | cpsw.txt | 2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
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| D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
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