Searched full:configuration (Results 1 – 25 of 1049) sorted by relevance
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| /Documentation/networking/ |
| D | devlink-params-bnxt.txt | 2 Configuration mode: Permanent
5 Configuration mode: Permanent
8 Configuration mode: Permanent
11 Configuration mode: Permanent
18 Configuration mode: Permanent
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| /Documentation/networking/dsa/ |
| D | b53.rst | 26 The configuration of the device depends on whether or not tagging is
29 The interface names and example network configuration are used according the
30 configuration described in the :ref:`dsa-config-showcases`.
32 Configuration with tagging support
35 The tagging based configuration is desired. It is not specific to the b53
38 See :ref:`dsa-tagged-configuration`.
40 Configuration without tagging support
46 switch need a different configuration.
48 The configuration slightly differ from the :ref:`dsa-vlan-configuration`.
54 In difference to the configuration described in :ref:`dsa-vlan-configuration`
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| /Documentation/hwmon/ |
| D | smsc47b397.rst | 104 Configuration Sequence
107 To program the configuration registers, the following sequence must be followed:
108 1. Enter Configuration Mode
109 2. Configure the Configuration Registers
110 3. Exit Configuration Mode.
112 Enter Configuration Mode
115 To place the chip into the Configuration State The config key (0x55) is written
118 Configuration Mode
121 In configuration mode, the INDEX PORT is located at the CONFIG PORT address and
124 The desired configuration registers are accessed in two steps:
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | sprd,pinctrl.txt | 7 to configure for some global common configuration, such as domain
15 There are too much various configuration that we can not list all
16 of them, so we can not make every Spreadtrum-special configuration
17 as one generic configuration, and maybe it will add more strange
18 global configuration in future. Then we add one "sprd,control" to
19 set these various global control configuration, and we need use
30 configuration.
34 related configuration are:
43 configuration, to set the pin sleep related configuration automatically
46 and set the pin sleep related configuration as "input-enable", which
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| D | pinctrl-bindings.txt | 3 Hardware modules that control pin multiplexing or configuration parameters
8 Hardware modules whose signals are affected by pin configuration are
14 single static pin configuration, e.g. set up during initialization. Others
22 configuration used by those states.
26 driver loads. This would allow representing a board's static pin configuration
31 they require certain specific named states for dynamic pin configuration.
37 property exists to define the pin configuration. Each state may also be
47 pinctrl-0: List of phandles, each pointing at a pin configuration
48 node. These referenced pin configuration nodes must be child
53 contributing part of the overall configuration. See the next
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| D | fsl,imx-pinctrl.txt | 12 phrase "pin configuration node".
14 Freescale IMX pin configuration node is a node of a group of pins which can be
24 Required properties for pin configuration node:
48 2. The pin configuration node intends to work on a specific function should
51 this group of pins in this pin configuration node are working on.
52 3. The driver can use the function node's name and pin configuration node's
55 as the function name and pin configuration node's name as group name to
57 4. Each pin configuration node should have a phandle, devices can set pins
58 configurations by referring to the phandle of that pin configuration node.
|
| D | lantiq,pinctrl-falcon.txt | 10 phrase "pin configuration node".
12 Lantiq's pin configuration nodes act as a container for an arbitrary number of
13 subnodes. Each of these subnodes represents some desired configuration for a
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those group(s), and two pin configuration parameters:
22 other words, a subnode that lists a mux function but no pin configuration
23 parameters implies no information about any pin configuration parameters.
|
| D | qcom,apq8064-pinctrl.txt | 24 phrase "pin configuration node".
26 Qualcomm's pin configuration nodes act as a container for an arbitrary number of
27 subnodes. Each of these subnodes represents some desired configuration for a
28 pin, a group, or a list of pins or groups. This configuration can include the
29 mux function to select on those pin(s)/group(s), and various pin configuration
36 other words, a subnode that lists a mux function but no pin configuration
37 parameters implies no information about any pin configuration parameters.
43 to specify in a pin configuration subnode:
|
| D | qcom,msm8660-pinctrl.txt | 24 phrase "pin configuration node".
26 Qualcomm's pin configuration nodes act as a container for an arbitrary number of
27 subnodes. Each of these subnodes represents some desired configuration for a
28 pin, a group, or a list of pins or groups. This configuration can include the
29 mux function to select on those pin(s)/group(s), and various pin configuration
36 other words, a subnode that lists a mux function but no pin configuration
37 parameters implies no information about any pin configuration parameters.
43 to specify in a pin configuration subnode:
|
| D | xlnx,zynq-pinctrl.txt | 10 phrase "pin configuration node".
12 Zynq's pin configuration nodes act as a container for an arbitrary number of
13 subnodes. Each of these subnodes represents some desired configuration for a
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those pin(s)/group(s), and various pin configuration
18 Each configuration node can consist of multiple nodes describing the pinmux and
29 Required properties for configuration nodes:
69 a pin configuration subnode:
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| D | qcom,ipq4019-pinctrl.txt | 27 phrase "pin configuration node".
29 The pin configuration nodes act as a container for an abitrary number of
30 subnodes. Each of these subnodes represents some desired configuration for a
31 pin, a group, or a list of pins or groups. This configuration can include the
32 mux function to select on those pin(s)/group(s), and various pin configuration
39 other words, a subnode that lists a mux function but no pin configuration
40 parameters implies no information about any pin configuration parameters.
46 to specify in a pin configuration subnode:
|
| D | qcom,ipq8064-pinctrl.txt | 24 phrase "pin configuration node".
26 Qualcomm's pin configuration nodes act as a container for an arbitrary number of
27 subnodes. Each of these subnodes represents some desired configuration for a
28 pin, a group, or a list of pins or groups. This configuration can include the
29 mux function to select on those pin(s)/group(s), and various pin configuration
36 other words, a subnode that lists a mux function but no pin configuration
37 parameters implies no information about any pin configuration parameters.
43 to specify in a pin configuration subnode:
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| D | renesas,pfc-pinctrl.txt | 51 The PFC node also acts as a container for pin configuration nodes. Please refer
53 configuration node" and for the common pinctrl bindings used by client devices.
55 Each pin configuration node represents a desired configuration for a pin, a
56 pin group, or a list of pins or pin groups. The configuration can include the
57 function to select on those pin(s) and pin configuration parameters (such as
60 Pin configuration nodes contain pin configuration properties, either directly
61 or grouped in child subnodes. Both pin muxing and configuration parameters can
62 be grouped in that way and referenced as a single pin configuration node by
65 A configuration node or subnode must reference at least one pin (through the
67 configuration parameter. When the function is present only pin groups can be
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| D | qcom,mdm9615-pinctrl.txt | 56 phrase "pin configuration node".
58 The pin configuration nodes act as a container for an arbitrary number of
59 subnodes. Each of these subnodes represents some desired configuration for a
60 pin, a group, or a list of pins or groups. This configuration can include the
61 mux function to select on those pin(s)/group(s), and various pin configuration
65 PIN CONFIGURATION NODES:
71 other words, a subnode that lists a mux function but no pin configuration
72 parameters implies no information about any pin configuration parameters.
78 to specify in a pin configuration subnode:
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| D | pinctrl-palmas.txt | 4 the configuration for Pull UP/DOWN, open drain etc.
14 phrase "pin configuration node".
16 Palmas's pin configuration nodes act as a container for an arbitrary number of
17 subnodes. Each of these subnodes represents some desired configuration for a
18 list of pins. This configuration can include the mux function to select on
19 those pin(s), and various pin configuration parameters, such as pull-up,
26 other words, a subnode that lists a mux function but no pin configuration
27 parameters implies no information about any pin configuration parameters.
|
| D | qcom,msm8974-pinctrl.txt | 24 phrase "pin configuration node".
26 Qualcomm's pin configuration nodes act as a container for an arbitrary number of
27 subnodes. Each of these subnodes represents some desired configuration for a
28 pin, a group, or a list of pins or groups. This configuration can include the
29 mux function to select on those pin(s)/group(s), and various pin configuration
36 other words, a subnode that lists a mux function but no pin configuration
37 parameters implies no information about any pin configuration parameters.
43 to specify in a pin configuration subnode:
|
| D | oxnas,pinctrl.txt | 7 OXNAS 'pin configuration node' is a node of a group of pins which can be
9 pins, optional function, and optional mux related configuration.
15 Required properties for pin configuration sub-nodes:
16 - pins: List of pins to which the configuration applies.
18 Optional properties for pin configuration sub-nodes:
|
| D | ste,nomadik.txt | 12 phrase "pin configuration node".
14 ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
15 subnodes. Each of these subnodes represents some desired configuration for a
16 pin, a group, or a list of pins or groups. This configuration can include the
17 mux function to select on those pin(s)/group(s), and various pin configuration
32 Required pin configuration subnode properties:
33 - pins: A string array describing the pins affected by the configuration
35 - ste,config: Handle of pin configuration node
56 3: sleep input and keep last input configuration (no pull, pull up or pull down).
|
| /Documentation/devicetree/bindings/pci/ |
| D | designware-pcie.txt | 7 - reg: For designware cores version < 4.80 contains the configuration
9 the configuration and ATU address space
10 - reg-names: Must be "config" for the PCIe configuration space and "atu" for
12 (The old way of getting the configuration address space from "ranges"
37 automatic checking of CDM (Configuration Dependent Module) registers
38 for data corruption. CDM registers include standard PCIe configuration
51 Example configuration:
56 <0xd0000000 0x0002000>; /* Configuration space */
72 <0xd0000000 0x2000000>; /* Configuration space */
|
| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-magnetometer-hmc5843 | 6 Current configuration and available configurations
9 positivebias - Positive bias configuration
10 negativebias - Negative bias configuration
13 Note: The effect of this configuration may vary
|
| D | sysfs-driver-typec-displayport | 1 What: /sys/bus/typec/devices/.../displayport/configuration
5 Shows the current DisplayPort configuration for the connector.
16 The configuration can be changed by writing to the file
18 Note. USB configuration does not equal to Exit Mode. It is
19 separate configuration defined in VESA DisplayPort Alt Mode on
40 possible to set pin assignment before configuration has been
|
| D | sysfs-class-net-grcan | 7 Hardware configuration of physical interface 0. This file reads
8 and writes the "Enable 0" bit of the configuration register.
19 Hardware configuration of physical interface 1. This file reads
20 and writes the "Enable 1" bit of the configuration register.
31 Configuration of which physical interface to be used. Possible
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| /Documentation/devicetree/bindings/arm/freescale/ |
| D | fsl,vf610-mscm-cpucfg.txt | 1 Freescale Vybrid Miscellaneous System Control - CPU Configuration
4 block of registers which contains CPU configuration information.
8 - reg: the register range of the MSCM CPU configuration registers
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | scfg.txt | 1 Freescale Supplement configuration unit (SCFG)
3 SCFG is the supplemental configuration unit, that provides SoC specific
4 configuration and status registers for the chip. Such as getting PEX port
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| /Documentation/devicetree/bindings/usb/ |
| D | usb-device.txt | 13 for devices of class 0 or 9 (hub) with a single configuration and a single
37 the product id, CN is the configuration value and IN is the interface
43 - reg: the interface number and configuration value
45 The configuration component is not included in the textual representation of
46 an interface-node unit address for configuration 1.
92 interface@0 { /* interface 0 of configuration 1 */
97 interface@0,2 { /* interface 0 of configuration 2 */
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