Searched full:correction (Results 1 – 25 of 45) sorted by relevance
12
| /Documentation/driver-api/ |
| D | mtdnand.rst | 401 and correction. Return 1 respectively 2 in case the error can be
404 software generator then use the correction function provided by
412 standard Reed-Solomon syndrome before calling the error correction code
697 0x00 ECC byte 0 Error correction code byte 0
698 0x01 ECC byte 1 Error correction code byte 1
699 0x02 ECC byte 2 Error correction code byte 2
717 0x00 ECC byte 0 Error correction code byte 0 of the lower
719 0x01 ECC byte 1 Error correction code byte 1 of the lower
721 0x02 ECC byte 2 Error correction code byte 2 of the lower
723 0x03 ECC byte 3 Error correction code byte 0 of the upper
[all …]
|
| D | edac.rst | 1 Error Detection And Correction (EDAC) Devices
48 just one memory stick when an error occurs, as the error correction code
|
| /Documentation/core-api/ |
| D | librs.rst | 11 correction functions.
34 correction with the given polynomial. It either uses an existing
91 The correction of the data buffer can be suppressed by providing a
92 correction pattern buffer and an error location buffer to the decoder.
93 The decoder stores the calculated error location and the correction
102 Decoding with syndrome calculation, direct data correction
119 Decoding with syndrome given by hardware decoder, direct data correction
138 Decoding with syndrome given by hardware decoder, no direct data correction.
|
| /Documentation/devicetree/bindings/edac/ |
| D | aspeed-sdram-edac.txt | 4 correction check).
6 The memory controller supports SECDED (single bit error correction, double bit
|
| /Documentation/media/v4l-drivers/ |
| D | ipu3.rst | 272 Distortion Correction (GDC) -> DDR
377 c [label="Optical Black Correction"]
379 e [label="Lens Shading Correction"]
384 j [label="Color Correction Matrix"]
385 k [label="Gamma correction"]
389 o [label="Total Color Correction"]
409 Optical Black Correction Optical Black Correction block subtracts a pre-defined
417 SHD Lens shading correction is used to correct spatial
434 Color Correction Color Correction algo transforms sensor specific color
438 Gamma correction Gamma correction :c:type:`ipu3_uapi_gamma_config` is a
[all …]
|
| /Documentation/devicetree/bindings/media/ |
| D | renesas,imr.txt | 1 Renesas R-Car Image Renderer (Distortion Correction Engine)
4 The image renderer, or the distortion correction engine, is a drawing processor
|
| /Documentation/devicetree/bindings/sound/ |
| D | st,sta32x.txt | 67 If present, power bridge correction for THD reduction near maximum
96 st,max-power-correction; // enables power bridge
97 // correction for THD reduction
|
| D | st,sta350.txt | 71 If present, power bridge correction for THD reduction near maximum
126 st,max-power-correction; // enables power bridge
127 // correction for THD reduction
|
| /Documentation/devicetree/bindings/mtd/ |
| D | gpmc-nand.txt | 49 Using ELM for ECC error correction frees some CPU cycles.
113 support ecc-schemes with hardware error-correction (BCHx_HW). However
114 such SoC can use ecc-schemes with software library for error-correction
115 (BCHx_HW_DETECTION_SW). The error correction capability with software
|
| D | nand-controller.yaml | 20 desires in terms of correction capability of a controller. Together,
55 embedded in the NAND controller) or software correction
|
| D | fsmc-nand.txt | 37 Can support 1-bit HW ECC (default) or if stronger correction is required,
|
| D | ingenic,jz4780-nand.txt | 73 The ECC controller is a separate SoC component used for error correction on
|
| /Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-sdram-edac.txt | 1 Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
|
| /Documentation/media/uapi/dvb/ |
| D | dvb-frontend-parameters.rst | 72 fe_code_rate_t fec_inner; /* forward error correction (see above) */
88 fe_code_rate_t fec_inner; /* forward error correction (see above) */
|
| D | frontend-stat-properties.rst | 103 Measures the number of bit errors before the forward error correction
160 Measures the number of bit errors after the forward error correction
218 correction coding (after Reed-Solomon or other outer code).
|
| /Documentation/arm/samsung-s3c24xx/ |
| D | nand.rst | 19 size, with support for hardware ECC generation and correction.
|
| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-isl29501 | 24 The sensor is able to perform correction of distance
|
| /Documentation/admin-guide/device-mapper/ |
| D | verity.rst | 92 Use forward error correction (FEC) to recover from corruption if hash
154 If forward error correction (FEC) support is enabled any recovery of
156 corresponding data. This is why combining error correction with
|
| /Documentation/devicetree/bindings/reserved-memory/ |
| D | ramoops.txt | 10 as kernel log messages, or for optional ECC error-correction data. The total
|
| /Documentation/admin-guide/ |
| D | ras.rst | 44 * Memory – add error correction logic (ECC) to detect and correct errors;
58 Codes that allow error correction when the number of errors on a bit packet
73 correction threshold, and the system was unable to auto-correct.
125 detection/correction mechanisms.
149 it has 8 extra bits to be used by error detection and correction mechanisms.
160 used for error correction. So, on 64 bit systems, a memory module
162 8 bits extra bits to be used for the error detection and correction
167 using Hamming code, or some other error correction code, like SECDED+,
188 doing 128-bit reads/writes. That gives 16 bits for error correction, with
189 significantly improves the error correction mechanism, at the expense
[all …]
|
| /Documentation/hwmon/ |
| D | tmp401.rst | 88 TMP461 is compatible with TMP401. It supports offset correction
|
| /Documentation/devicetree/bindings/display/panel/ |
| D | tpo,tpg110.yaml | 30 for properties of the display such as gamma correction and
|
| /Documentation/devicetree/bindings/misc/ |
| D | xlnx,sd-fec.txt | 3 The Soft Decision Forward Error Correction (SDFEC) Engine is a Hard IP block
|
| /Documentation/devicetree/bindings/net/ |
| D | amd-xgbe.txt | 43 - amd,serdes-blwc: Baseline wandering correction enablement
|
| /Documentation/admin-guide/pm/ |
| D | cpuidle.rst | 278 to get the sleep length correction factor.
280 The ``menu`` governor maintains two arrays of sleep length correction factors.
283 the case. Each array contains several correction factor values that correspond
287 The correction factor for the given sleep length range (determined before
290 to 1 the correction factor becomes (it must fall between 0 and 1 inclusive).
291 The sleep length is multiplied by the correction factor for the range that it
307 sleep length multiplied by the correction factor and the minimum of the two is
352 First, it does not use sleep length correction factors, but instead it attempts
|
12