Searched full:counters (Results 1 – 25 of 123) sorted by relevance
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| /Documentation/core-api/ |
| D | local_ops.rst | 30 counters. They minimize the performance cost of standard atomic operations by
34 Having fast per CPU atomic counters is interesting in many cases: it does not
36 coherent counters in NMI handlers. It is especially useful for tracing purposes
37 and for various performance monitoring counters.
95 static DEFINE_PER_CPU(local_t, counters) = LOCAL_INIT(0);
107 local_inc(&get_cpu_var(counters));
108 put_cpu_var(counters);
113 local_inc(this_cpu_ptr(&counters));
117 Reading the counters
120 Those local counters can be read from foreign CPUs to sum the count. Note that
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| /Documentation/admin-guide/device-mapper/ |
| D | statistics.rst | 14 The I/O statistics counters for each step-sized area of a region are
16 Documentation/admin-guide/iostats.rst). But two extra counters (12 and 13) are
19 histogram of latencies. All these counters may be accessed by sending
111 Clear all the counters except the in-flight i/o counters.
133 Print counters for each step-sized area of a region.
149 counters
151 The first 11 counters have the same meaning as
168 Additional counters:
174 Atomically print and then clear all the counters except the
175 in-flight i/o counters. Useful when the client consuming the
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| /Documentation/riscv/ |
| D | pmu.rst | 22 * Enabling/Disabling counters
23 Counters are just free-running all the time in our case.
27 It is not possible to have many interrupt ports for all counters, so an
30 * Writing to counters
32 counters [1]. Alternatively, some vendor considers to implement
33 hardware-extension for M-S-U model machines to write counters directly.
72 into bitmap, so that HW-related control registers or counters can directly be
140 // check the section Reading/Writing Counters for details.
159 4. Reading/Writing Counters
168 But the core of perf does not need direct write to counters. Writing counters
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| /Documentation/devicetree/bindings/arc/ |
| D | archs-pct.txt | 1 * ARC HS Performance Counters
5 are 100+ hardware conditions dynamically mapped to up to 32 counters.
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| D | pct.txt | 1 * ARC Performance Counters
5 are 100+ hardware conditions dynamically mapped to up to 32 counters
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| /Documentation/admin-guide/perf/ |
| D | imx-ddr.rst | 5 There are no performance counters inside the DRAM controller, so performance
7 counters is implemented. This is controlled by the CSV modes programed in counter
12 “time” and when expired causes a lock on itself and the other counters and an
43 event at the same time as this filter is shared between counters.
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| D | qcom_l3_pmu.rst | 17 The hardware implements 32bit event counters and has a flat 8bit event space
19 counters the driver supports virtual 64bit hardware counters by using hardware
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| D | thunderx2-pmu.rst | 12 The DMC and L3C support up to 4 counters. Counters are independently
14 can be set to a different event. Counters are 32-bit and do not support
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| /Documentation/ABI/stable/ |
| D | sysfs-class-infiniband | 81 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/symbol_error
82 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/port_rcv_errors
83 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/port_rcv_remote_physical_errors
84 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/port_rcv_switch_relay_errors
85 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/link_error_recovery
86 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/port_xmit_constraint_errors
87 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/port_rcv_contraint_errors
88 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/local_link_integrity_errors
89 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/excessive_buffer_overrun_errors
90 What: /sys/class/infiniband/<device>/ports/<port-num>/counters/port_xmit_data
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| D | sysfs-fs-orangefs | 5 Counters and settings for various caches.
14 reset all the counters in
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| /Documentation/ABI/testing/ |
| D | sysfs-kernel-irq | 44 is a comma-separated list of counters; one per CPU in CPU id
45 order. NOTE: This file consistently shows counters for all
47 which only shows counters for online CPUs.
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| D | sysfs-bus-event_source-devices-hv_gpci | 6 counters being accumulated by other guests and to physical
7 domain event counters.
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| D | debugfs-hisi-zip | 19 disable counters clear after reading of these registers.
49 disable counters clear after reading of these registers.
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| D | sysfs-bus-pci-devices-aer_stats | 5 statistical counters indicate the errors "as seen/reported by the device".
7 counters may increment at its link partner (e.g. root port) because the
9 problematic endpoint itself (which may report all counters as 0 as it never
103 device, so these counters include them and are thus cumulative of all the error
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| D | sysfs-devices-edac | 5 counters for UE and CE errors on the given memory controller.
6 Zeroing the counters will also reset the timer indicating how
8 computing errors/time. Since the counters are always reset
17 counters to measure error rates.
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| D | sysfs-firmware-acpi | 149 Root has permission to clear any of these counters. Eg.
152 All counters can be cleared by clearing the total "sci":
155 None of these counters has an effect on the function
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| /Documentation/RCU/ |
| D | rcu.rst | 44 counters. These counters allow limited types of blocking within
46 counters, and permits general blocking within RCU read-side
48 by sampling these counters.
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| /Documentation/arm64/ |
| D | perf.txt | 77 On non-VHE hosts we enable/disable counters on the entry/exit of host/guest
79 enabling/disabling the counters and entering/exiting the guest. We are
80 able to eliminate counters counting host events on the boundaries of guest
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| /Documentation/x86/ |
| D | tlb.rst | 65 performance counters and 'perf stat', like this::
76 may have differently-named counters, but they should at least
79 counters for a given CPU.
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| /Documentation/networking/ |
| D | xfrm_proc.txt | 10 dropped by the transformation code and why. These counters are defined
11 as part of the linux private MIB. These counters can be viewed in
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| /Documentation/filesystems/nfs/ |
| D | knfsd-stats.txt | 31 All counters are 64 bits wide and wrap naturally. There is no way
32 to zero these counters, instead applications should do their own
112 counted, but can be inferred from the other counters thus:
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| /Documentation/devicetree/bindings/timer/ |
| D | nuvoton,npcm7xx-timer.txt | 4 timer counters.
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| D | energymicro,efm32-timer.txt | 3 The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be
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| /Documentation/devicetree/bindings/watchdog/ |
| D | digicolor-wdt.txt | 5 timer counters. The first timer (called "Timer A") is the only one that can be
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| /Documentation/scheduler/ |
| D | sched-stats.rst | 5 Version 15 of schedstats dropped counters for some sched_yield:
12 release). Some counters make more sense to be per-runqueue; other to be
26 These fields are counters, and only increment. Programs which make use
28 the change in the counters at each subsequent observation. A perl script
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