Searched full:cpu1 (Results 1 – 25 of 35) sorted by relevance
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| /Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-system.txt | 6 - cpu1-start-addr : CPU1 start address in hex.
12 cpu1-start-addr = <0xffd080c4>;
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| /Documentation/devicetree/bindings/power/ |
| D | renesas,apmu.txt | 29 This shows the r8a7791 APMU that can control CPU0 and CPU1.
34 cpus = <&cpu0 &cpu1>;
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| /Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,nsp-cpu-method.txt | 16 is a dual core CPU SoC, this entry should be added to cpu1 node.
31 cpu1: cpu@1 {
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| D | brcm,bcm23550-cpu-method.txt | 29 cpu1: cpu@1 {
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| D | brcm,bcm11351-cpu-method.txt | 29 cpu1: cpu@1 {
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | riscv,cpu-intc.txt | 44 cpu1: cpu@1 {
47 cpu1-intc: interrupt-controller {
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| D | sifive,plic-1.0.0.txt | 52 &cpu1-intc 11 &cpu1-intc 9
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| D | arm,gic-v3.yaml | 270 affinity = <&cpu1 &cpu3>;
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| /Documentation/scheduler/ |
| D | sched-energy.rst | 152 composed of two CPUs each. CPU0 and CPU1 are little CPUs; CPU2 and CPU3
179 CPU0 CPU1 CPU2 CPU3
186 CPU1 and CPU3. Then it will estimate the energy of the system if P was
192 **Case 1. P is migrated to CPU1**::
198 * CPU1: 300 / 341 * 150 = 131
207 CPU0 CPU1 CPU2 CPU3
216 * CPU1: 100 / 341 * 150 = 43
225 CPU0 CPU1 CPU2 CPU3
234 * CPU1: 100 / 512 * 300 = 58
243 CPU0 CPU1 CPU2 CPU3
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| /Documentation/ |
| D | IRQ-affinity.txt | 38 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
57 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
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| D | atomic_t.txt | 110 In this case we would expect the atomic_set() from CPU1 to either happen
121 CPU0 CPU1
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| /Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 199 cpu = <&CPU1>;
284 CPU1: cpu@1 {
417 cpu = <&CPU1>;
449 CPU1: cpu@1 {
508 cpu = <&CPU1>;
523 CPU1: cpu@1 {
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| /Documentation/devicetree/bindings/arm/ |
| D | cci.txt | 151 CPU1: cpu@1 {
223 CCI slave interface @0x000000002c094000 is connected to CPUs {CPU0, CPU1};
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| D | coresight.txt | 315 cpu = <&cpu1>;
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| D | cpu-capacity.txt | 211 cpu1: cpu@1 {
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-mediatek.txt | 191 cpu1: cpu@1 {
231 &cpu1 {
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| D | cpufreq-qcom-hw.txt | 69 CPU1: cpu@100 {
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| /Documentation/powerpc/ |
| D | vcpudispatch_stats.txt | 44 cpu1 2515 1274 1229 12 0 2509 6 0
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| /Documentation/infiniband/ |
| D | core_locking.rst | 84 CPU1 CPU2
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| /Documentation/devicetree/bindings/net/ |
| D | marvell-pp2.txt | 49 "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported
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| /Documentation/devicetree/bindings/opp/ |
| D | sun50i-nvmem-cpufreq.txt | 52 cpu1: cpu@1 {
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| D | qcom-nvmem-cpufreq.txt | 79 CPU1: cpu@1 {
126 cpu = <&CPU1>;
713 CPU1: cpu@101 {
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| /Documentation/driver-api/ |
| D | edac.rst | 169 cpu/cpu1/.. <L1 and L2 block directory>
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| /Documentation/devicetree/bindings/sound/ |
| D | audio-graph-card.txt | 229 CPU1 ------ HDMI
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| /Documentation/driver-api/thermal/ |
| D | intel_powerclamp.rst | 108 CPU1
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