Searched full:cpu2 (Results 1 – 25 of 25) sorted by relevance
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | sifive,plic-1.0.0.txt | 53 &cpu2-intc 11 &cpu2-intc 9
|
| D | arm,gic-v3.yaml | 266 affinity = <&cpu0 &cpu2>;
|
| /Documentation/ |
| D | IRQ-affinity.txt | 38 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
57 CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
|
| D | memory-barriers.txt | 1445 void cpu2(void)
1458 Because cpu0(), cpu1(), and cpu2() participate in a chain of
1480 Although cpu0(), cpu1(), and cpu2() will see their respective reads and
|
| /Documentation/devicetree/bindings/cpu/ |
| D | cpu-topology.txt | 205 cpu = <&CPU2>;
292 CPU2: cpu@100 {
420 cpu = <&CPU2>;
455 CPU2: cpu@2 {
511 cpu = <&CPU2>;
514 cpu0 = <&CPU2>;
529 CPU2: cpu@2 {
|
| /Documentation/scheduler/ |
| D | sched-energy.rst | 152 composed of two CPUs each. CPU0 and CPU1 are little CPUs; CPU2 and CPU3
179 CPU0 CPU1 CPU2 CPU3
199 * CPU2: 600 / 768 * 800 = 625
207 CPU0 CPU1 CPU2 CPU3
217 PP * CPU2: 600 / 768 * 800 = 625
225 CPU0 CPU1 CPU2 CPU3
235 * CPU2: 600 / 768 * 800 = 625
243 CPU0 CPU1 CPU2 CPU3
|
| /Documentation/devicetree/bindings/thermal/ |
| D | uniphier-thermal.txt | 61 cooling-device = <&cpu2 (-1) (-1)>;
|
| /Documentation/devicetree/bindings/arm/ |
| D | cci.txt | 158 CPU2: cpu@100 {
224 CCI slave interface @0x000000002c095000 is connected to CPUs {CPU2, CPU3};
|
| D | cpu-capacity.txt | 218 cpu2: cpu@2 {
|
| D | idle-states.txt | 377 CPU2: cpu@100 {
604 CPU2: cpu@2 {
|
| /Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-mediatek.txt | 203 cpu2: cpu@100 {
235 &cpu2 {
|
| D | cpufreq-qcom-hw.txt | 82 CPU2: cpu@200 {
|
| /Documentation/powerpc/ |
| D | vcpudispatch_stats.txt | 45 cpu2 2317 1198 1109 10 0 2312 5 0
|
| /Documentation/infiniband/ |
| D | core_locking.rst | 84 CPU1 CPU2
|
| /Documentation/devicetree/bindings/net/ |
| D | marvell-pp2.txt | 49 "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported
|
| /Documentation/devicetree/bindings/opp/ |
| D | sun50i-nvmem-cpufreq.txt | 63 cpu2: cpu@2 {
|
| D | qcom-nvmem-cpufreq.txt | 91 CPU2: cpu@100 {
132 cpu = <&CPU2>;
724 CPU2: cpu@102 {
|
| /Documentation/admin-guide/ |
| D | cputopology.rst | 166 started with possible_cpus=144. There are 4 CPUs in the system and cpu2
|
| /Documentation/devicetree/bindings/sound/ |
| D | audio-graph-card.txt | 230 CPU2 ------ PCM3168A-p /* DPCM 1ch/2ch */
|
| D | simple-card.txt | 285 CPU2 --/ /* DPCM 3ch/4ch */
|
| /Documentation/virt/kvm/ |
| D | vcpu-requests.rst | 213 CPU1 CPU2
|
| /Documentation/core-api/ |
| D | cpu_hotplug.rst | 109 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu2
|
| /Documentation/ia64/ |
| D | err_inject.rst | 49 #On cpu2, inject only total 0x10 errors, interval 5 seconds
|
| /Documentation/translations/ko_KR/ |
| D | memory-barriers.txt | 1438 void cpu2(void)
1451 cpu0(), cpu1(), 그리고 cpu2() 는 smp_store_release()/smp_load_acquire() 쌍의
1471 cpu0(), cpu1(), 그리고 cpu2() 는 그들의 읽기와 쓰기를 순서대로 보게 되지만,
|
| /Documentation/filesystems/ |
| D | proc.txt | 1071 CPU0 CPU1 CPU2 CPU3
|