Searched full:cs0 (Results 1 – 25 of 30) sorted by relevance
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| /Documentation/ABI/testing/ |
| D | sysfs-class-watchdog | 90 chip at CS0 after booting from the alternate
93 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
98 the SoC is in normal mapping state (i.e. booted from CS0),
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,armada-370-pinctrl.txt | 29 mpp12 12 gpio, ge0(rxd1), i2c1(sda), sd0(d0), spi1(cs0),
45 mpp24 24 gpio, ge0(col), ge1(txctl), spi1(cs0)
53 mpp32 32 gpio, spi0(cs0)
54 mpp33 33 gpio, dev(bootcs), spi0(cs0)
71 mpp49 49 gpio, dev(ad10), pcie(clkreq1), sd0(d0), spi1(cs0),
86 mpp58 58 gpio, dev(cs0), uart1(rts), tdm(int), audio(extclk),
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| D | marvell,armada-98dx3236-pinctrl.txt | 17 mpp3 3 gpio, spi0(cs0), dev(ad11)
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
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| D | marvell,armada-39x-pinctrl.txt | 36 mpp18 18 gpio, ua1(txd), spi0(cs0), i2c2(sck)
44 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
81 mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
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| D | marvell,armada-38x-pinctrl.txt | 36 mpp18 18 gpio, ge0(rxerr), ptp(trig), ua1(txd), spi0(cs0)
43 mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
77 mpp59 59 gpio, pcie0(rstout), i2c1(sda), spi1(cs0), sd0(d2)
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| D | marvell,armada-375-pinctrl.txt | 24 mpp8 8 gpio, dev (bootcs), spi0(cs0), spi1(cs0)
46 mpp30 30 gpio, ge1(txd0), spi1(cs0)
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| D | marvell,armada-xp-pinctrl.txt | 37 mpp16 16 gpio, ge0(txd7), ge1(txd3), spi1(cs0), lcd(d16)
60 mpp39 39 gpio, spi0(cs0)
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| D | lantiq,pinctrl-falcon.txt | 40 por, ntr, ntr8k, hrst, mdio, bootled, asc0, spi, spi cs0, spi cs1, i2c,
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| D | marvell,kirkwood-pinctrl.txt | 138 mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
187 mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo)
202 mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk)
251 mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo),
272 mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk), lcd(d19)
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| /Documentation/devicetree/bindings/iio/dac/ |
| D | ti,dac7512.txt | 16 reg = <0>; /* CS0 */
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| D | ti,dac7311.txt | 19 reg = <0>; /* CS0 */
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| D | ltc2632.txt | 33 reg = <0>; /* CS0 */
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| /Documentation/devicetree/bindings/mtd/ |
| D | tango-nand.txt | 28 reg = <0>; /* CS0 */
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| D | gpmc-onenand.txt | 40 reg = <0 0 0>; /* CS0, offset 0 */
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| D | ti,am654-hbmc.txt | 42 ranges = <0x0 0x0 0x5 0x00000000 0x4000000>, /* CS0 - 64MB */
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| D | stm32-fmc2-nand.txt | 10 and address space for CS0.
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| D | gpmc-nand.txt | 68 ranges = <0 0 0x08000000 0x1000000>; /* CS0 space, 16MB */
75 reg = <0 0 4>; /* CS0, offset 0, NAND I/O window 4 */
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| /Documentation/devicetree/bindings/mfd/ |
| D | motorola-cpcap.txt | 43 reg = <0>; /* cs0 */
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| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.txt | 11 (CS0 thru CS5) so that in theory 6 different devices can be connected.
24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
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| D | imx-weim.txt | 36 IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 41 part attached to CS1, it should be the same type as the one on CS0,
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-orion.txt | 50 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */
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| D | spi-controller.yaml | 40 cs0 : &gpio1 0 0
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl172.txt | 102 cs0 {
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ads7846.txt | 89 reg = <0>; /* CS0 */
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