| /Documentation/devicetree/bindings/pinctrl/ |
| D | lantiq,pinctrl-xway.txt | 50 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
51 ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3,
62 ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy,
82 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
83 ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1,
94 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
106 ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd,
120 exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
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| D | marvell,armada-370-pinctrl.txt | 27 mpp11 11 gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1),
28 sata1(prsnt), spi1(cs1)
70 spi0(cs1)
80 mpp55 55 gpio, dev(cs1), uart1(txd), tdm(rst), sata1(prsnt),
83 pcie(clkreq0), spi1(cs1)
95 mpp64 64 gpio, spi0(miso), spi0(cs1)
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| D | marvell,armada-98dx3236-pinctrl.txt | 18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
46 mpp32 32 gpio, slv_smi(mdio), smi(mdio), dev(cs1)
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| D | marvell,armada-38x-pinctrl.txt | 30 mpp12 12 gpio, ge0(rxd0), pcie0(rstout), spi0(cs1), dev(ad14), pcie3(clkreq)
39 mpp21 21 gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs), sata1(prsnt)
44 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
73 mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
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| D | marvell,armada-375-pinctrl.txt | 16 mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
51 mpp35 35 gpio, ge1(rxctl), spi1(cs1), spi0(cs2)
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| D | marvell,armada-39x-pinctrl.txt | 39 mpp21 21 gpio, spi0(cs1), sata0(prsnt) [1], sd0(cmd), dev(bootcs),
45 mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
77 mpp55 55 gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd)
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| D | marvell,dove-pinctrl.txt | 23 uart1(cts), lcd-spi(cs1), pmu*
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
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| D | marvell,armada-xp-pinctrl.txt | 61 mpp40 40 gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0),
62 spi1(cs1)
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| D | lantiq,pinctrl-falcon.txt | 40 por, ntr, ntr8k, hrst, mdio, bootled, asc0, spi, spi cs0, spi cs1, i2c,
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| D | marvell,kirkwood-pinctrl.txt | 148 mpp34 34 gpio, ge1(txen), tdm(spi-cs1)
197 mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act)
199 mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi)
266 mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act), lcd(d14)
269 mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi), twsi1(sda)
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| /Documentation/ABI/testing/ |
| D | sysfs-class-watchdog | 91 chip at CS1.
93 from (CS0->CS1, CS1->CS0) to (CS0->CS0,
94 CS1->CS1).
100 For alternate boot mode (booted from CS1 due to wdt2
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 39 - cs1-used : Have this property if CS1 of this EMIF
41 part attached to CS1, it should be the same type as the one on CS0,
66 cs1-used;
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| /Documentation/devicetree/bindings/mtd/ |
| D | tango-nand.txt | 34 reg = <1>; /* CS1 */
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| D | ti,am654-hbmc.txt | 43 <0x1 0x0 0x5 0x04000000 0x4000000>; /* CS1 - 64MB */
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| D | stm32-fmc2-nand.txt | 11 Regions 5 to 7 contain the same areas for CS1.
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ingenic,jz4780-nemc.txt | 46 Example (NEMC node with a NAND child device attached at CS1):
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| /Documentation/devicetree/bindings/bus/ |
| D | uniphier-system-bus.txt | 63 - the Ethernet device is connected at the offset 0x01f00000 of CS1 and
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| D | qcom,ebi2.txt | 18 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
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| D | imx-weim.txt | 36 IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-orion.txt | 51 <MBUS_ID(0x01, 0x5e) 0 0xffffffff>, /* CS1 */
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| D | spi-controller.yaml | 41 cs1 : native
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