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/Documentation/devicetree/bindings/rtc/
Datmel,at91sam9-rtc.txt5 - reg: should encode the memory region of the RTT controller
8 - atmel,rtt-rtc-time-reg: should encode the GPBR register used to store
11 encode the offset within the GPBR block (or in other words, the
/Documentation/devicetree/bindings/pci/
Dralink,rt3883-pci.txt12 - #address-cells: specifies the number of cells needed to encode an
37 - #address-cells: specifies the number of cells needed to encode an
41 - #interrupt-cells: specifies the number of cells needed to encode an
52 - #address-cells: specifies the number of cells needed to encode an
58 - #interrupt-cells: specifies the number of cells needed to encode an
Dxilinx-pcie.txt6 - #interrupt-cells: specifies the number of cells needed to encode an
27 - #address-cells: specifies the number of cells needed to encode an
29 - #interrupt-cells: specifies the number of cells needed to encode an
Drockchip-pcie-host.txt6 - #interrupt-cells: specifies the number of cells needed to encode an
39 - #interrupt-cells: specifies the number of cells needed to encode an
74 - #address-cells: specifies the number of cells needed to encode an
76 - #interrupt-cells: specifies the number of cells needed to encode an
Dmobiveil-pcie.txt9 - #interrupt-cells: specifies the number of cells needed to encode an
29 - #interrupt-cells: specifies the number of cells needed to encode an
Dxilinx-nwl-pcie.txt7 - #interrupt-cells: specifies the number of cells needed to encode an
33 - #address-cells: specifies the number of cells needed to encode an
/Documentation/devicetree/bindings/interrupt-controller/
Dimg,meta-intc.txt17 - #interrupt-cells: Specifies the number of cells needed to encode an
20 - #address-cells: Specifies the number of cells needed to encode an
55 // Two cells to encode interrupt sources.
Dopen-pic.txt22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
65 // Two cells to encode interrupt sources.
Dmarvell,orion-intc.txt9 - #interrupt-cells: number of cells to encode an interrupt source, shall be 1
33 - #interrupt-cells: number of cells to encode an interrupt source, shall be 1
Dmrvl,intc.txt16 - #interrupt-cells : Specifies the number of cells needed to encode an
46 - #interrupt-cells: Specifies the number of cells needed to encode an
Dezchip,nps400-ic.txt7 - #interrupt-cells : Specifies the number of cells needed to encode an
Dtechnologic,ts4800.txt12 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
Ddigicolor-ic.txt9 - #interrupt-cells : Specifies the number of cells needed to encode an
Daspeed,ast2400-vic.txt13 - #interrupt-cells : Specifies the number of cells needed to encode an
Dmscc,ocelot-icpu-intr.txt8 - #interrupt-cells : Specifies the number of cells needed to encode an
Dloongson,ls1x-intc.txt9 - #interrupt-cells : Specifies the number of cells needed to encode an
Dopencores,or1k-pic.txt14 - #interrupt-cells : Specifies the number of cells needed to encode an
Djcore,aic.txt15 - #interrupt-cells: Specifies the number of cells needed to encode an
Dimg,pdc-intc.txt19 - #interrupt-cells: Specifies the number of cells needed to encode an
58 // Three cells to encode interrupt sources.
Dti,omap2-intc.txt11 - #interrupt-cells : Specifies the number of cells needed to encode an
Dingenic,intc.txt13 - #interrupt-cells : Specifies the number of cells needed to encode an
/Documentation/devicetree/bindings/mtd/
Dspi-nand.txt5 - reg: should encode the chip-select line used to access the NAND chip
/Documentation/devicetree/bindings/security/tpm/
Dibmvtpm.txt14 encode the physical address field of dma-window
17 encode the size field of dma-window properties
/Documentation/devicetree/bindings/reset/
Dath79-reset.txt10 - #reset-cells : Specifies the number of cells needed to encode reset
/Documentation/devicetree/bindings/mailbox/
Dbrcm,bcm2835-mbox.txt9 - #mbox-cells: Specifies the number of cells needed to encode a mailbox

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