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/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
15 Software Generated Interrupts (SGI), and Locality-specific Peripheral
19 - $ref: /schemas/interrupt-controller.yaml#
24 - items:
25 - enum:
26 - qcom,msm8996-gic-v3
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Dal,alpine-msix.txt3 See arm,gic-v3.txt for SPI and MSI definitions.
7 - compatible: should be "al,alpine-msix"
8 - reg: physical base address and size of the registers
9 - interrupt-controller: identifies the node as an interrupt controller
10 - msi-controller: identifies the node as an PCI Message Signaled Interrupt
12 - al,msi-base-spi: SPI base of the MSI frame
13 - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
18 compatible = "al,alpine-msix";
20 interrupt-parent = <&gic>;
21 interrupt-controller;
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/Documentation/devicetree/bindings/arm/
Dspe-pmu.txt4 performance sample data using an in-memory trace buffer.
8 - compatible : should be one of:
9 "arm,statistical-profiling-extension-v1"
11 - interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
13 the arm,gic-v3 binding for details on describing a PPI partition.
17 spe-pmu {
18 compatible = "arm,statistical-profiling-extension-v1";
/Documentation/devicetree/bindings/pci/
Dpcie-al.txt5 Documentation/devicetree/bindings/pci/designware-pcie.txt.
9 - compatible:
13 - "amazon,al-alpine-v2-pcie" for alpine_v2
14 - "amazon,al-alpine-v3-pcie" for alpine_v3
16 - reg:
18 Value type: <prop-encoded-array>
19 Definition: Register ranges as listed in the reg-names property
21 - reg-names:
25 - "config" PCIe ECAM space
26 - "controller" AL proprietary registers
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/Documentation/virt/kvm/devices/
Dvcpu.txt6 kvm_device_attr as other devices, but targets VCPU-wide settings and controls.
16 Returns: -EBUSY: The PMU overflow interrupt is already set
17 -ENXIO: The overflow interrupt not set when attempting to get it
18 -ENODEV: PMUv3 not supported
19 -EINVAL: Invalid PMU overflow interrupt number supplied or
20 trying to set the IRQ number without using an in-kernel
23 A value describing the PMUv3 (Performance Monitor Unit v3) overflow interrupt
30 Returns: -ENODEV: PMUv3 not supported or GIC not initialized
31 -ENXIO: PMUv3 not properly configured or in-kernel irqchip not
33 -EBUSY: PMUv3 already initialized
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Darm-vgic.txt9 controller, requiring emulated user-space devices to inject interrupts to the
14 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
21 KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit)
22 Base address in the guest physical address space of the GIC distributor
26 KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit)
27 Base address in the guest physical address space of the GIC virtual cpu
31 -E2BIG: Address outside of addressable IPA range
32 -EINVAL: Incorrectly aligned address
33 -EEXIST: Address already configured
34 -ENXIO: The group or attribute is unknown/unsupported for this device
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Darm-vgic-v3.txt1 ARM Virtual Generic Interrupt Controller v3 and later (VGICv3)
6 KVM_DEV_TYPE_ARM_VGIC_V3 ARM Generic Interrupt Controller v3.0
9 will act as the VM interrupt controller, requiring emulated user-space devices
19 KVM_VGIC_V3_ADDR_TYPE_DIST (rw, 64-bit)
24 KVM_VGIC_V3_ADDR_TYPE_REDIST (rw, 64-bit)
31 KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION (rw, 64-bit)
33 bits: | 63 .... 52 | 51 .... 16 | 15 - 12 |11 - 0
35 - index encodes the unique redistributor region index
36 - flags: reserved for future use, currently 0
37 - base field encodes bits [51:16] of the guest physical base address
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Darm-vgic-its.txt7 The ITS allows MSI(-X) interrupts to be injected into guests. This extension is
9 arm-vgic-v3.txt), but does not depend on having physical ITS controllers.
12 a separate, non-overlapping MMIO region.
18 KVM_VGIC_ITS_ADDR_TYPE (rw, 64-bit)
23 -E2BIG: Address outside of addressable IPA range
24 -EINVAL: Incorrectly aligned address
25 -EEXIST: Address already configured
26 -EFAULT: Invalid user pointer for attr->addr.
27 -ENODEV: Incorrect attribute or the ITS is not supported.
53 The GITS_IIDR read-only register must also be restored before
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/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.txt7 modes. It provides power-gating controllers for SoC and CPU power-islands.
10 - name : Should be pmc
11 - compatible : Should contain one of the following:
12 For Tegra20 must contain "nvidia,tegra20-pmc".
13 For Tegra30 must contain "nvidia,tegra30-pmc".
14 For Tegra114 must contain "nvidia,tegra114-pmc"
15 For Tegra124 must contain "nvidia,tegra124-pmc"
16 For Tegra132 must contain "nvidia,tegra124-pmc"
17 For Tegra210 must contain "nvidia,tegra210-pmc"
18 - reg : Offset and length of the register set for the device
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/Documentation/virt/kvm/
Dapi.txt1 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
5 ----------------------
10 - System ioctls: These query and set global attributes which affect the
14 - VM ioctls: These query and set attributes that affect an entire virtual
21 - vcpu ioctls: These query and set attributes that control the operation
29 - device ioctls: These query and set attributes that control the operation
36 -------------------
73 -------------
77 facility that allows backward-compatible extensions to the API to be
87 ------------------
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