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/Documentation/devicetree/bindings/sound/
Dsoc-ac97link.txt1 AC97 link bindings
6 - pinctrl-names: Has to contain following states to setup the correct
7 pinmuxing for the used gpios:
8 "ac97-running": AC97-link is active
9 "ac97-reset": AC97-link reset state
10 "ac97-warm-reset": AC97-link warm reset state
11 - ac97-gpios: List of gpio phandles with args in the order ac97-sync,
12 ac97-sdata, ac97-reset
20 pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
21 pinctrl-0 = <&ac97link_running>;
[all …]
Dti,tas6424.txt1 Texas Instruments TAS6424 Quad-Channel Audio amplifier
6 - compatible: "ti,tas6424" - TAS6424
7 - reg: I2C slave address
8 - sound-dai-cells: must be equal to 0
9 - standby-gpios: GPIO used to shut the TAS6424 down.
10 - mute-gpios: GPIO used to mute all the outputs
18 #sound-dai-cells = <0>;
21 For more product information please see the link below:
22 http://www.ti.com/product/TAS6424-Q1
/Documentation/devicetree/bindings/display/bridge/
Dthine,thc63lvd1024.txt2 -------------------------------------------
4 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS streams
12 - compatible: Shall be "thine,thc63lvd1024"
13 - vcc-supply: Power supply for TTL output, TTL CLOCKOUT signal, LVDS input,
17 - powerdown-gpios: Power down GPIO signal, pin name "/PDWN". Active low
18 - oe-gpios: Output enable GPIO signal, pin name "OE". Active high
24 - port@0: First LVDS input port
25 - port@2: First digital CMOS/TTL parallel output
28 - port@1: Second LVDS input port
29 - port@3: Second digital CMOS/TTL parallel output
[all …]
Dti,ds90c185.txt1 Texas Instruments FPD-Link (LVDS) Serializer
2 --------------------------------------------
4 The DS90C185 and DS90C187 are low-power serializers for portable
5 battery-powered applications that reduces the size of the RGB
10 - compatible: Should be
11 "ti,ds90c185", "lvds-encoder" for the TI DS90C185 FPD-Link Serializer
12 "ti,ds90c187", "lvds-encoder" for the TI DS90C187 FPD-Link Serializer
16 - powerdown-gpios: Power down control GPIO (the PDB pin, active-low)
23 - Video port 0 for parallel input
24 - Video port 1 for LVDS output
[all …]
/Documentation/devicetree/bindings/net/dsa/
Dqca8k.txt5 - compatible: should be one of:
9 - #size-cells: must be 0
10 - #address-cells: must be 1
14 - reset-gpios: GPIO to be used to reset the whole device
20 mdio-bus each subnode describing a port needs to have a valid phandle
24 Don't use mixed external and internal mdio-bus configurations, as this is
31 - fixed-link : Fixed-link subnode describing a link to a non-MDIO
33 Documentation/devicetree/bindings/net/fixed-link.txt
36 For QCA8K the 'fixed-link' sub-node supports only the following properties:
38 - 'speed' (integer, mandatory), to indicate the link speed. Accepted
[all …]
Dlan9303.txt2 -------------------------------------------------
6 - compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
9 - "smsc,lan9303-mdio" for mdio managed mode
13 - reset-gpios: GPIO to be used to reset the whole device
14 - reset-duration: reset duration in milliseconds, defaults to 200 ms
23 auto-detected and mapped accordingly.
31 fixed-link { /* RMII fixed link to LAN9303 */
33 full-duplex;
38 compatible = "smsc,lan9303-i2c";
[all …]
Ddsa.txt2 ----------------------------------------------------
12 - ports : A container for child nodes representing switch ports.
16 - dsa,member : A two element list indicates which DSA cluster, and position
26 - #address-cells : Must be 1
27 - #size-cells : Must be 0
30 - reg : Describes the port address in the switch
35 - link : Should be a list of phandles to other switch's DSA
43 - ethernet : Should be a phandle to a valid Ethernet device node.
49 - label : Describes the label associated with this port, which
55 - phy-handle : Phandle to a PHY on an MDIO bus. See
[all …]
Dksz.txt6 - compatible: For external switch chips, compatible string must be exactly one
8 - "microchip,ksz8765"
9 - "microchip,ksz8794"
10 - "microchip,ksz8795"
11 - "microchip,ksz9477"
12 - "microchip,ksz9897"
13 - "microchip,ksz9896"
14 - "microchip,ksz9567"
15 - "microchip,ksz8565"
16 - "microchip,ksz9893"
[all …]
Drealtek-smi.txt1 Realtek SMI-based Switches
4 The SMI "Simple Management Interface" is a two-wire protocol using
5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
7 SMI-based Realtek devices.
11 - compatible: must be exactly one of:
22 - mdc-gpios: GPIO line for the MDC clock line.
23 - mdio-gpios: GPIO line for the MDIO data line.
24 - reset-gpios: GPIO line for the reset signal.
27 - realtek,disable-leds: if the LED drivers are not used in the
33 - interrupt-controller
[all …]
Dvitesse,vsc73xx.txt9 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
10 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
11 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
12 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
17 reside inside a SPI bus device tree node, see spi/spi-bus.txt
19 When the chip is connected to a parallel memory bus and work in memory-mapped
25 - compatible: must be exactly one of:
30 - gpio-controller: indicates that this switch is also a GPIO controller,
32 - #gpio-cells: this must be set to <2> and indicates that we are a twocell
37 - reset-gpios: a handle to a GPIO line that can issue reset of the chip.
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
18 - clock-lanes: should be <0>
[all …]
Dmt9v032.txt1 * Aptina 1/3-Inch WVGA CMOS Digital Image Sensor
3 The Aptina MT9V032 is a 1/3-inch CMOS active pixel digital image sensor with
5 two-wire serial interface.
9 - compatible: value should be either one among the following
21 - link-frequencies: List of allowed link frequencies in Hz. Each frequency is
22 expressed as a 64-bit big-endian integer.
23 - reset-gpios: GPIO handle which is connected to the reset pin of the chip.
24 - standby-gpios: GPIO handle which is connected to the standby pin of the chip.
27 Documentation/devicetree/bindings/media/video-interfaces.txt.
37 link-frequencies = /bits/ 64
Dnokia,smia.txt8 Documentation/devicetree/bindings/media/video-interfaces.txt .
12 Documentation/devicetree/bindings/media/video-interfaces.txt .
15 --------------------
17 - compatible: "nokia,smia"
18 - reg: I2C address (0x10, or an alternative address)
19 - vana-supply: Analogue voltage supply (VANA), typically 2,8 volts (sensor
21 - clocks: External clock to the sensor
22 - clock-frequency: Frequency of the external clock to the sensor
23 - link-frequencies: List of allowed data link frequencies. An array of
24 64-bit elements.
[all …]
Dsony,imx214.txt1 * Sony 1/3.06-Inch 13.13Mp CMOS Digital Image Sensor
3 The Sony imx214 is a 1/3.06-inch CMOS active pixel digital image sensor with
6 Image data is sent through MIPI CSI-2, through 2 or 4 lanes at a maximum
11 - compatible: Shall be "sony,imx214".
12 - reg: I2C bus address of the device. Depending on how the sensor is wired,
14 - enable-gpios: GPIO descriptor for the enable pin.
15 - vdddo-supply: Chip digital IO regulator (1.8V).
16 - vdda-supply: Chip analog regulator (2.7V).
17 - vddd-supply: Chip digital core regulator (1.12V).
18 - clocks: Reference to the xclk clock.
[all …]
Dov7740.txt7 The common video interfaces bindings (see video-interfaces.txt) should
8 be used to specify link to the image data receiver. The OV7740 device
12 - compatible: "ovti,ov7740".
13 - reg: I2C slave address of the sensor.
14 - clocks: Reference to the xvclk input clock.
15 - clock-names: "xvclk".
18 - reset-gpios: Rreference to the GPIO connected to the reset_b pin,
19 if any. Active low with pull-ip resistor.
20 - powerdown-gpios: Reference to the GPIO connected to the pwdn pin,
21 if any. Active high with pull-down resistor.
[all …]
/Documentation/devicetree/bindings/display/msm/
Dedp.txt4 - compatible:
5 * "qcom,mdss-edp"
6 - reg: Physical base address and length of the registers of controller and PLL
7 - reg-names: The names of register regions. The following regions are required:
10 - interrupts: The interrupt signal from the eDP block.
11 - power-domains: Should be <&mmcc MDSS_GDSC>.
12 - clocks: device clocks
13 See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
14 - clock-names: the following clocks are required:
19 * "link"
[all …]
/Documentation/devicetree/bindings/net/
Dfsl-fec.txt4 - compatible : Should be "fsl,<soc>-fec"
5 - reg : Address and length of the register set for the device
6 - interrupts : Should contain fec interrupt
7 - phy-mode : See ethernet.txt file in the same directory
10 - phy-supply : regulator that powers the Ethernet PHY.
11 - phy-handle : phandle to the PHY device connected to this device.
12 - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
13 Use instead of phy-handle.
14 - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
17 - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
[all …]
Dnixge.txt4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5 older device trees with DMA engines co-located in the address map,
7 - reg: Address and length of the register set for the device. It contains the
8 information of registers in the same order as described by reg-names.
9 - reg-names: Should contain the reg names
12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
14 - phy-mode: See ethernet.txt file in the same directory.
15 - nvmem-cells: Phandle of nvmem cell containing the MAC address
16 - nvmem-cell-names: Should be "address"
[all …]
/Documentation/devicetree/bindings/fpga/
Daltera-passive-serial.txt5 The passive serial link is not technically SPI, and might require extra
11 - compatible: Must be one of the following:
12 "altr,fpga-passive-serial",
13 "altr,fpga-arria10-passive-serial"
14 - reg: SPI chip select of the FPGA
15 - nconfig-gpios: config pin (referred to as nCONFIG in the manual)
16 - nstat-gpios: status pin (referred to as nSTATUS in the manual)
19 - confd-gpios: confd pin (referred to as CONF_DONE in the manual)
23 compatible = "altr,fpga-passive-serial";
24 spi-max-frequency = <20000000>;
[all …]
Dxilinx-slave-serial.txt3 Xilinx Spartan-6 FPGAs support a method of loading the bitstream over
5 The slave serial link is not technically SPI, and might require extra
11 - compatible: should contain "xlnx,fpga-slave-serial"
12 - reg: spi chip select of the FPGA
13 - prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
14 - done-gpios: config status pin (referred to as DONE in the manual)
18 fpga-region0 {
19 compatible = "fpga-region";
20 fpga-mgr = <&fpga_mgr_spi>;
21 #address-cells = <0x1>;
[all …]
/Documentation/devicetree/bindings/display/connector/
Dhdmi-connector.txt5 - compatible: "hdmi-connector"
6 - type: the HDMI connector type: "a", "b", "c", "d" or "e"
9 - label: a symbolic name for the connector
10 - hpd-gpios: HPD GPIO number
11 - ddc-i2c-bus: phandle link to the I2C controller used for DDC EDID probing
12 - ddc-en-gpios: signal to enable DDC bus
15 - Video port for HDMI input
18 -------
21 compatible = "hdmi-connector";
28 remote-endpoint = <&tpd12s015_out>;
Ddvi-connector.txt5 - compatible: "dvi-connector"
8 - label: a symbolic name for the connector
9 - ddc-i2c-bus: phandle to the i2c bus that is connected to DVI DDC
10 - analog: the connector has DVI analog pins
11 - digital: the connector has DVI digital pins
12 - dual-link: the connector has pins for DVI dual-link
13 - hpd-gpios: HPD GPIO number
16 - Video port for DVI input
21 -------
24 compatible = "dvi-connector";
[all …]
/Documentation/devicetree/bindings/display/panel/
Dorisetech,otm8009a.txt1 Orise Tech OTM8009A 3.97" 480x800 TFT LCD panel (MIPI-DSI video mode)
4 a MIPI-DSI video interface. Its backlight is managed through the DSI link.
7 - compatible: "orisetech,otm8009a"
8 - reg: the virtual channel number of a DSI peripheral
11 - reset-gpios: a GPIO spec for the reset pin (active low).
12 - power-supply: phandle of the regulator that provides the supply voltage.
20 reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
21 power-supply = <&v1v8>;
/Documentation/devicetree/bindings/media/
Dsamsung-s5c73m3.txt2 ------------------------------
4 The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656) video
11 ---------------------
15 - compatible : "samsung,s5c73m3";
16 - reg : I2C slave address of the sensor;
17 - vdd-int-supply : digital power supply (1.2V);
18 - vdda-supply : analog power supply (1.2V);
19 - vdd-reg-supply : regulator input power supply (2.8V);
20 - vddio-host-supply : host I/O power supply (1.8V to 2.8V);
21 - vddio-cis-supply : CIS I/O power supply (1.2V to 1.8V);
[all …]
/Documentation/devicetree/bindings/leds/
Dleds-lp8860.txt1 * Texas Instruments - lp8860 4-Channel LED Driver
3 The LP8860-Q1 is an high-efficiency LED
4 driver with boost controller. It has 4 high-precision
9 - compatible :
11 - reg : I2C slave address
12 - #address-cells : 1
13 - #size-cells : 0
16 - enable-gpios : gpio pin to enable (active high)/disable the device.
17 - vled-supply : LED supply
20 - reg : 0
[all …]

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