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/Documentation/scsi/
Dg_NCR5380.txt10 memory mapped modes.
30 base=xx[,...] the port or base address(es) (for port or memory mapped, resp.)
41 mapped, resp.)
53 E.g. a port mapped NCR5380 board, driver to probe for IRQ:
58 E.g. a memory mapped NCR53C400 board with no IRQ:
/Documentation/media/uapi/dvb/
Ddmx-munmap.rst40 Address of the mapped buffer as returned by the
44 Length of the mapped buffer. This must be the same value as given to
51 Unmaps a previously with the :ref:`mmap() <dmx-mmap>` function mapped
63 mapped yet.
Ddmx-reqbufs.rst43 This ioctl is used to initiate a memory mapped or DMABUF based demux I/O.
45 Memory mapped buffers are located in device memory and must be allocated
46 with this ioctl before they can be mapped into the application's address
70 buffers, however this cannot succeed when any buffers are still mapped.
Ddmx-mmap.rst57 The ``flags`` parameter specifies the type of the mapped object,
58 mapping options and whether modifications made to the mapped copy of
69 ``MAP_SHARED`` allows applications to share the mapped memory with
104 On success :ref:`mmap() <dmx-mmap>` returns a pointer to the mapped buffer. On
/Documentation/admin-guide/mm/
Dpagemap.rst14 physical frame each virtual page is mapped to. It contains one 64-bit
23 * Bit 56 page exclusively mapped (since 4.2)
37 precisely which pages are mapped (or in swap) and comparing mapped
41 determine which areas of memory are actually mapped and llseek to
45 times each page is mapped, indexed by PFN.
48 number of times a page is mapped.
165 a memory mapped page
167 a memory mapped page that is not part of a file
169 page is mapped to swap space, i.e. has an associated swap entry
183 mapped to what.
/Documentation/media/uapi/v4l/
Dfunc-munmap.rst38 Address of the mapped buffer as returned by the
42 Length of the mapped buffer. This must be the same value as given to
53 Unmaps a previously with the :ref:`mmap() <func-mmap>` function mapped
65 mapped yet.
Dvidioc-reqbufs.rst41 This ioctl is used to initiate :ref:`memory mapped <mmap>`,
43 Memory mapped buffers are located in device memory and must be allocated
44 with this ioctl before they can be mapped into the application's address
69 buffers. Note that if any buffers are still mapped or exported via DMABUF,
151 mapped or exported via DMABUF. These orphaned buffers will be freed
Dcolorspaces-defs.rst155 - For the Hue, the 360 degrees are mapped into 8 bits, i.e. each
176 mapped to [0…255] (with possible clipping to [1…254] to avoid the
177 0x00 and 0xff values). Cb and Cr are mapped from [-0.5…0.5] to
182 is mapped to [16…235]. Cb and Cr are mapped from [-0.5…0.5] to
Dfunc-mmap.rst73 The ``flags`` parameter specifies the type of the mapped object,
74 mapping options and whether modifications made to the mapped copy of
85 ``MAP_SHARED`` allows applications to share the mapped memory with
127 On success :ref:`mmap() <func-mmap>` returns a pointer to the mapped buffer. On
/Documentation/devicetree/bindings/display/
Dst,stih4xx.txt6 - reg: Physical base address of the IP registers and length of memory mapped region.
14 - reg: Physical base address of the IP registers and length of memory mapped region.
32 - reg: Physical base address of the IP registers and length of memory mapped region.
48 - reg: Physical base address of the IP registers and length of memory mapped region.
49 - reg-names: names of the mapped memory regions listed in regs property in
60 - reg: Physical base address of the IP registers and length of memory mapped region.
61 - reg-names: names of the mapped memory regions listed in regs property in
76 - reg: Physical base address of the IP registers and length of memory mapped region.
77 - reg-names: names of the mapped memory regions listed in regs property in
89 - reg: Physical base address of the IP registers and length of memory mapped region.
[all …]
/Documentation/devicetree/bindings/net/
Dmdio-mux-mmioreg.txt1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
5 node must be a child of the memory-mapped device. The driver currently only
23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes.
/Documentation/
Dio-mapping.txt26 With this mapping object, individual pages can be mapped either atomically
44 mapped.
63 the task to sleep while holding the page mapped.
71 for pages mapped with io_mapping_map_wc.
Dio_ordering.txt2 Ordering I/O writes to memory-mapped addresses
5 On some platforms, so-called memory-mapped I/O is weakly ordered. On such
7 memory-mapped addresses on their device arrive in the order intended. This is
/Documentation/devicetree/bindings/clock/
Dfixed-mmio-clock.txt1 Binding for simple memory mapped io fixed-rate clock sources.
2 The driver reads a clock frequency value from a single 32-bit memory mapped
/Documentation/input/
Dgamepad.rst72 features that you need, first. How each feature is mapped is described below.
152 If analog-sticks provide digital buttons, they are mapped accordingly as
174 Menu buttons are always digital and are mapped according to their location
179 Mapped as BTN_START
183 Left button mapped as BTN_SELECT, right button mapped as BTN_START
186 and meaning. Such buttons are mapped as BTN_MODE. Examples are the Nintendo
/Documentation/devicetree/bindings/interrupt-controller/
Dti,c64x+megamod-pic.txt68 interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
84 combiner. Combiner-0 is mapped to core interrupt 12, combiner-1 is mapped
101 mapped directly to core priority interrupt 8. The node using this interrupt
/Documentation/devicetree/bindings/gpio/
Dwd,mbl-gpio.txt1 Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
3 The Western Digital MyBook Live has two memory-mapped GPIO controllers.
Dgpio-mm-lantiq.txt1 Lantiq SoC External Bus memory mapped GPIO controller
7 The node describing the memory mapped GPIOs needs to be a child of the node
/Documentation/devicetree/bindings/spi/
Datmel-quadspi.txt8 and the mapped memory.
11 - qspi_mmap: memory mapped address space
/Documentation/devicetree/bindings/arm/
Dvexpress-scc.txt8 In some cases its registers are also mapped in normal address space
23 - reg: when the SCC is memory mapped, physical address and size of the
/Documentation/firmware-guide/acpi/
Dlpit.rst13 (Function fixed hardware) or a memory mapped interface.
19 - Platform Controller Hub (PCH) SLP_S0 (Read via memory mapped interface)
/Documentation/vm/
Dunevictable-lru.rst47 * Those mapped into SHM_LOCK'd shared memory regions.
49 * Those mapped into VM_LOCKED [mlock()ed] VMAs.
201 There may be situations where a page is mapped into a VM_LOCKED VMA, but the
245 mapped the page. More on this below.
251 mlocked pages - pages mapped into a VM_LOCKED VMA - are a class of unevictable
278 (1) mapped in a range unlocked via the munlock()/munlockall() system calls;
306 Note that the VMA being mlocked might be mapped with PROT_NONE. In this case,
316 In the worst case, this will result in a page mapped in a VM_LOCKED VMA
396 the page is mapped by other VM_LOCKED VMAs.
460 We handle this by keeping PTE-mapped huge pages on normal LRU lists: the
[all …]
/Documentation/devicetree/bindings/timer/
Darm,arch_timer_mmio.yaml7 title: ARM memory mapped architected timer
14 ARM cores may have a memory mapped architected timer, which provides up to 8
17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
/Documentation/devicetree/bindings/usb/
Docteon-usb.txt10 the length of the memory mapped region.
41 the length of the memory mapped region.
/Documentation/admin-guide/device-mapper/
Dcache-policies.rst11 Every bio that is mapped by the target is referred to the policy.
123 dmsetup message <mapped device> 0 sequential_threshold 1024
124 dmsetup message <mapped device> 0 random_threshold 8
130 creates a 128GB large mapped device named 'blah' with the

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