Home
last modified time | relevance | path

Searched +full:meson +full:- +full:gx +full:- +full:vpu (Results 1 – 4 of 4) sorted by relevance

/Documentation/devicetree/bindings/power/
Damlogic,meson-gx-pwrc.txt1 Amlogic Meson Power Controller
4 The Amlogic Meson SoCs embeds an internal Power domain controller.
6 VPU Power Domain
7 ----------------
16 ---------------------
19 - compatible: should be one of the following :
20 - "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs
21 - "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs
22 - #power-domain-cells: should be 0
23 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node
[all …]
Damlogic,meson-ee-pwrc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson Everything-Else Power Domains
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Everything-Else Power Domains node should be the child of a syscon
17 - compatible: Should be the following:
18 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"
26 - amlogic,meson-g12a-pwrc
[all …]
/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Amlogic Meson Display Controller
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Amlogic Meson Display controller is composed of several components
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
[all …]
Damlogic,meson-dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
14 The Amlogic Meson Synopsys Designware Integration is composed of
15 - A Synopsys DesignWare HDMI Controller IP
16 - A TOP control block controlling the Clocks and PHY
17 - A custom HDMI PHY in order to convert video to TMDS signal
33 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
[all …]