Searched +full:meson +full:- +full:gxbb +full:- +full:vpu (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---5 $id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"8 title: Amlogic Meson Display Controller11 - Neil Armstrong <narmstrong@baylibre.com>14 The Amlogic Meson Display controller is composed of several components17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|19 D |-------| |----| | | | | HDMI PLL |20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---5 $id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"11 - Neil Armstrong <narmstrong@baylibre.com>14 The Amlogic Meson Synopsys Designware Integration is composed of15 - A Synopsys DesignWare HDMI Controller IP16 - A TOP control block controlling the Clocks and PHY17 - A custom HDMI PHY in order to convert video to TMDS signal33 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux[all …]