Home
last modified time | relevance | path

Searched full:ns (Results 1 – 25 of 129) sorted by relevance

123456

/Documentation/devicetree/bindings/mtd/
Dgpmc-nor.txt14 - gpmc,cs-on-ns: Chip-select assertion time
15 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
16 - gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
17 - gpmc,oe-on-ns: Output-enable assertion time
18 - gpmc,oe-off-ns: Output-enable de-assertion time
19 - gpmc,we-on-ns Write-enable assertion time
20 - gpmc,we-off-ns: Write-enable de-assertion time
21 - gpmc,access-ns: Start cycle to first data capture (read access)
22 - gpmc,rd-cycle-ns: Total read cycle time
23 - gpmc,wr-cycle-ns: Total write cycle time
[all …]
Dcadence-quadspi.txt28 - cdns,tshsl-ns : Delay in nanoseconds for the length that the master
31 - cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
33 - cdns,tchsh-ns : Delay in nanoseconds between last bit of current
36 - cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
62 cdns,tshsl-ns = <50>;
63 cdns,tsd2d-ns = <50>;
64 cdns,tchsh-ns = <4>;
65 cdns,tslch-ns = <4>;
Dgpmc-nand.txt84 gpmc,cs-on-ns = <0>;
85 gpmc,cs-rd-off-ns = <44>;
86 gpmc,cs-wr-off-ns = <44>;
87 gpmc,adv-on-ns = <6>;
88 gpmc,adv-rd-off-ns = <34>;
89 gpmc,adv-wr-off-ns = <44>;
90 gpmc,we-off-ns = <40>;
91 gpmc,oe-off-ns = <54>;
92 gpmc,access-ns = <64>;
93 gpmc,rd-cycle-ns = <82>;
[all …]
/Documentation/devicetree/bindings/net/
Dgpmc-eth.txt29 - gpmc,cs-on-ns: Chip-select assertion time
30 - gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
31 - gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
32 - gpmc,oe-on-ns: Output-enable assertion time
33 - gpmc,oe-off-ns: Output-enable de-assertion time
34 - gpmc,we-on-ns: Write-enable assertion time
35 - gpmc,we-off-ns: Write-enable de-assertion time
36 - gpmc,access-ns: Start cycle to first data capture (read access)
37 - gpmc,rd-cycle-ns: Total read cycle time
38 - gpmc,wr-cycle-ns: Total write cycle time
[all …]
Damlogic,meson-dwmac.yaml56 amlogic,tx-delay-ns:
60 nanoseconds. Allowed values are 0ns, 2ns, 4ns, 6ns.
62 explicitly configured. When not configured a fallback of 2ns is
65 this property should be set to 0ns (which disables the TX clock
/Documentation/devicetree/bindings/memory-controllers/
Datmel,ebi.txt83 - atmel,smc-ncs-rd-setup-ns
84 - atmel,smc-nrd-setup-ns
85 - atmel,smc-ncs-wr-setup-ns
86 - atmel,smc-nwe-setup-ns
87 - atmel,smc-ncs-rd-pulse-ns
88 - atmel,smc-nrd-pulse-ns
89 - atmel,smc-ncs-wr-pulse-ns
90 - atmel,smc-nwe-pulse-ns
91 - atmel,smc-nwe-cycle-ns
92 - atmel,smc-nrd-cycle-ns
[all …]
Dti-aemif.txt95 - ti,cs-min-turnaround-ns: minimum turn around time, ns
102 - ti,cs-read-setup-ns: read setup width, ns
107 - ti,cs-read-strobe-ns: read strobe width, ns
112 - ti,cs-read-hold-ns: read hold width, ns
119 - ti,cs-write-setup-ns: write setup width, ns
124 - ti,cs-write-strobe-ns: write strobe width, ns
129 - ti,cs-write-hold-ns: write hold width, ns
165 ti,cs-min-turnaround-ns = <0>;
166 ti,cs-read-hold-ns = <7>;
167 ti,cs-read-strobe-ns = <42>;
[all …]
Domap-gpmc.txt58 - gpmc,cs-on-ns: Assertion time
59 - gpmc,cs-rd-off-ns: Read deassertion time
60 - gpmc,cs-wr-off-ns: Write deassertion time
63 - gpmc,adv-on-ns: Assertion time
64 - gpmc,adv-rd-off-ns: Read deassertion time
65 - gpmc,adv-wr-off-ns: Write deassertion time
66 - gpmc,adv-aad-mux-on-ns: Assertion time for AAD
67 - gpmc,adv-aad-mux-rd-off-ns: Read deassertion time for AAD
68 - gpmc,adv-aad-mux-wr-off-ns: Write deassertion time for AAD
71 - gpmc,we-on-ns Assertion time
[all …]
/Documentation/devicetree/bindings/opp/
Dqcom-nvmem-cpufreq.txt151 clock-latency-ns = <200000>;
157 clock-latency-ns = <200000>;
163 clock-latency-ns = <200000>;
169 clock-latency-ns = <200000>;
175 clock-latency-ns = <200000>;
181 clock-latency-ns = <200000>;
187 clock-latency-ns = <200000>;
193 clock-latency-ns = <200000>;
199 clock-latency-ns = <200000>;
205 clock-latency-ns = <200000>;
[all …]
Dsun50i-nvmem-cpufreq.txt47 clock-latency-ns = <244144>; /* 8 32k periods */
58 clock-latency-ns = <244144>; /* 8 32k periods */
69 clock-latency-ns = <244144>; /* 8 32k periods */
80 clock-latency-ns = <244144>; /* 8 32k periods */
92 clock-latency-ns = <244144>; /* 8 32k periods */
101 clock-latency-ns = <244144>; /* 8 32k periods */
110 clock-latency-ns = <244144>; /* 8 32k periods */
119 clock-latency-ns = <244144>; /* 8 32k periods */
128 clock-latency-ns = <244144>; /* 8 32k periods */
137 clock-latency-ns = <244144>; /* 8 32k periods */
[all …]
Dopp.txt135 - clock-latency-ns: Specifies the maximum possible transition latency (in
212 clock-latency-ns = <300000>;
219 clock-latency-ns = <310000>;
224 clock-latency-ns = <290000>;
291 clock-latency-ns = <300000>;
298 clock-latency-ns = <310000>;
304 lock-latency-ns = <290000>;
367 clock-latency-ns = <300000>;
374 clock-latency-ns = <310000>;
380 clock-latency-ns = <290000>;
[all …]
/Documentation/m68k/
Dbuddha-driver.rst124 A6=1 (for example $840 for port 0, register set 0), a 780ns
142 about 30ns to the clocks on the Zorro bus, that's why the
143 values are no multiple of 71. One clock-cycle is 71ns long
147 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
152 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
155 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
158 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
161 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
167 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
[all …]
/Documentation/devicetree/bindings/i2c/
Di2c-designware.txt27 - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
31 - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.
32 This value which is by default 300ns is used to compute the tLOW period.
34 - i2c-sda-falling-time-ns : should contain the SDA falling time in nanoseconds.
35 This value which is by default 300ns is used to compute the tHIGH period.
56 i2c-sda-hold-time-ns = <300>;
57 i2c-sda-falling-time-ns = <300>;
58 i2c-scl-falling-time-ns = <300>;
Di2c-rk3x.txt36 - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise
38 the maximum the specification allows(1000 ns for Standard-mode,
39 300 ns for Fast-mode) which might cause slightly slower communication.
40 - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall
42 be the maximum the specification allows (300 ns) which might cause
44 - i2c-sda-falling-time-ns : Number of nanoseconds the SDA signal takes to fall
66 i2c-scl-rising-time-ns = <800>;
67 i2c-scl-falling-time-ns = <100>;
Di2c.txt43 - i2c-scl-falling-time-ns
47 - i2c-scl-internal-delay-ns
50 - i2c-scl-rising-time-ns
54 - i2c-sda-falling-time-ns
/Documentation/filesystems/nfs/
Dnfs41-server.txt40 NS Not Supported.
41 NS* Unimplemented optional feature.
57 NS*| DELEGPURGE | OPT | FDELG (REQ) | Section 18.5 |
67 NS*| GETDEVICELIST | OPT | pNFS (OPT) | Section 18.41 |
69 NS*| GET_DIR_DELEGATION | OPT | DDELG (REQ) | Section 18.39 |
81 NS*| OPENATTR | OPT | | Section 18.17 |
104 NS | SET_SSV | REQ | | Section 18.47 |
107 NS*| WANT_DELEGATION | OPT | FDELG (OPT) | Section 18.49 |
119 NS*| CB_NOTIFY | OPT | DDELG (REQ) | Section 20.4 |
120 NS*| CB_NOTIFY_DEVICEID | OPT | pNFS (OPT) | Section 20.12 |
[all …]
/Documentation/devicetree/bindings/mips/cavium/
Dbootbus.txt32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
34 - cavium,t-ce: A cell specifying the CE timing (in nS).
36 - cavium,t-oe: A cell specifying the OE timing (in nS).
38 - cavium,t-we: A cell specifying the WE timing (in nS).
40 - cavium,t-rd-hld: A cell specifying the RD_HLD timing (in nS).
42 - cavium,t-wr-hld: A cell specifying the WR_HLD timing (in nS).
44 - cavium,t-pause: A cell specifying the PAUSE timing (in nS).
46 - cavium,t-wait: A cell specifying the WAIT timing (in nS).
48 - cavium,t-page: A cell specifying the PAGE timing (in nS).
50 - cavium,t-rd-dly: A cell specifying the RD_DLY timing (in nS).
/Documentation/filesystems/
Dsysfs-tagging.txt21 void *ns member of its kernfs_node. If a directory entry is tagged,
23 and KOBJ_NS_TYPES, and ns will point to the namespace to which it
27 *ns[KOBJ_NS_TYPES]. When a task in a tagging namespace
30 s_fs_info->ns[kobj_nstype] set to the new namespace. Note that
34 kernfs_node->ns pointers pointing to it.
/Documentation/devicetree/bindings/phy/
Dbcm-ns-usb3-phy.txt5 - compatible: one of: "brcm,ns-ax-usb3-phy", "brcm,ns-bx-usb3-phy".
25 compatible = "brcm,ns-ax-usb3-phy";
Dbcm-ns-usb2-phy.txt4 - compatible: brcm,ns-usb2-phy
15 compatible = "brcm,ns-usb2-phy";
/Documentation/devicetree/bindings/iio/frequency/
Dadf4350.txt24 - adi,lock-detect-precision-6ns-enable: Enables 6ns lock detect precision.
25 Default = 10ns.
44 - adi,anti-backlash-3ns-enable: Enables 3ns antibacklash pulse width
/Documentation/devicetree/bindings/lpddr2/
Dlpddr2-timings.txt13 a different unit have a suffix indicating the unit such as 'tRAS-max-ns'
28 - tRAS-max-ns
51 tRAS-max-ns = <70000>;
/Documentation/devicetree/bindings/thermal/
Dbrcm,ns-thermal.txt7 - compatible : Must be "brcm,ns-thermal"
14 compatible = "brcm,ns-thermal";
/Documentation/devicetree/bindings/iommu/
Dqcom,iommu.txt37 - "qcom,msm-iommu-v1-ns" : non-secure context bank
67 compatible = "qcom,msm-iommu-v1-ns";
93 compatible = "qcom,msm-iommu-v1-ns";
100 compatible = "qcom,msm-iommu-v1-ns";
/Documentation/devicetree/bindings/iio/resolver/
Dad2s90.txt17 Chip's max frequency, as specified in its datasheet, is 2Mhz. But a 600ns
21 2 * 600ns, so the max frequency should be 1 / (2 * 6e-7), which gives

123456