Searched +full:output +full:- +full:high (Results 1 – 25 of 295) sorted by relevance
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| /Documentation/hwmon/ |
| D | ir35221.rst | 9 Addresses scanned: -
13 Author: Samuel Mendoza-Jonas <sam@mendozajonas.com>
17 -----------
19 IR35221 is a Digital DC-DC Multiphase Converter
23 -----------
32 # echo ir35221 0x70 > /sys/bus/i2c/devices/i2c-4/new_device
36 ----------------
42 curr1_max_alarm Current high alarm
44 curr[2-3]_label "iout[1-2]"
45 curr[2-3]_input Measured output current
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| D | ir38064.rst | 9 Addresses scanned: -
12 …https://www.infineon.com/dgdl/Infineon-IR38064MTRPBF-DS-v03_07-EN.pdf?fileId=5546d462584d1d4a0158d…
15 - Maxim Sloyko <maxims@google.com>
16 - Patrick Venture <venture@google.com>
19 -----------
21 IR38064 is a Single-input Voltage, Synchronous Buck Regulator, DC-DC Converter.
24 -----------
30 ----------------
34 curr1_input Measured output current
36 curr1_crit_alarm Current critical high alarm
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| D | isl68137.rst | 10 Addresses scanned: -
18 - Maxim Sloyko <maxims@google.com>
19 - Robert Lippert <rlippert@google.com>
20 - Patrick Venture <venture@google.com>
23 -----------
25 Intersil ISL68137 is a digital output 7-phase configurable PWM
29 -----------
39 ---------------------------
47 curr1_crit_alarm Current critical high alarm
49 curr[2-3]_label "iout[1-2]"
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| D | inspur-ipsps1.rst | 1 Kernel driver inspur-ipsps1
11 -----------
17 -----------
19 This driver does not auto-detect devices. You will have to instantiate the
20 devices explicitly. Please see Documentation/i2c/instantiating-devices for
24 -------------
32 curr1_max_alarm Current high alarm
33 curr2_input Measured output current in mA.
36 curr2_crit_alarm Current critical high alarm
38 curr2_max_alarm Current high alarm
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| D | max20751.rst | 10 Addresses scanned: -
16 Author: Guenter Roeck <linux@roeck-us.net>
20 -----------
30 -----------
32 This driver does not auto-detect devices. You will have to instantiate the
33 devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
38 ---------------------
44 -------------
58 in1_max_alarm Input voltage high alarm.
62 in2_min Minimum output voltage.
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| D | pxe1610.rst | 10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 -----------
36 PXE1610/PXE1110 are Multi-rail/Multiphase Digital Controllers
39 - Intel VR13 DC-DC converter specifications.
40 - Intel SVID protocol.
44 - Servers, Workstations, and High-end desktops
46 PXM1310 is a Multi-rail Controller and it is compliant to
48 - Intel VR13 DC-DC converter specifications.
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| D | ltc2978.rst | 10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
44 Addresses scanned: -
52 Addresses scanned: -
60 Addresses scanned: -
68 Addresses scanned: -
76 Addresses scanned: -
84 Addresses scanned: -
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| D | max31785.rst | 10 Addresses scanned: -
17 -----------
19 The Maxim MAX31785 is a PMBus device providing closed-loop, multi-channel fan
24 For dual-rotor configurations the MAX31785A exposes the second rotor tachometer
25 readings in attributes fan[5-8]_input. By contrast the MAX31785 only exposes
26 the slowest rotor measurement, and does so in the fan[1-4]_input attributes.
29 -----------
35 ----------------
38 fan[1-4]_alarm Fan alarm.
39 fan[1-4]_fault Fan fault.
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| D | zl6100.rst | 10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
42 Addresses scanned: -
50 Addresses scanned: -
58 Addresses scanned: -
66 Addresses scanned: -
74 Addresses scanned: -
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| D | lm25066.rst | 10 Addresses scanned: -
22 Addresses scanned: -
34 Addresses scanned: -
44 Addresses scanned: -
54 Addresses scanned: -
61 Author: Guenter Roeck <linux@roeck-us.net>
65 -----------
76 -----------
78 This driver does not auto-detect devices. You will have to instantiate the
79 devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
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| D | pmbus.rst | 10 Addresses scanned: -
14 http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146395
20 Addresses scanned: -
24 http://www.onsemi.com/pub_link/Collateral/ADP4000-D.PDF
26 http://www.onsemi.com/pub_link/Collateral/NCP4200-D.PDF
28 http://www.onsemi.com/pub_link/Collateral/JUNE%202009-%20REV.%200.PDF
34 Addresses scanned: -
52 Addresses scanned: -
70 Addresses scanned: -
75 Author: Guenter Roeck <linux@roeck-us.net>
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| D | ucd9200.rst | 11 Addresses scanned: -
15 - http://focus.ti.com/lit/ds/symlink/ucd9220.pdf
16 - http://focus.ti.com/lit/ds/symlink/ucd9222.pdf
17 - http://focus.ti.com/lit/ds/symlink/ucd9224.pdf
18 - http://focus.ti.com/lit/ds/symlink/ucd9240.pdf
19 - http://focus.ti.com/lit/ds/symlink/ucd9244.pdf
20 - http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
21 - http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
23 Author: Guenter Roeck <linux@roeck-us.net>
27 -----------
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| D | adm9240.rst | 10 Addresses scanned: I2C 0x2c - 0x2f
20 Addresses scanned: I2C 0x2c - 0x2f
24 http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf
30 Addresses scanned: I2C 0x2c - 0x2f
37 - Frodo Looijaard <frodol@dds.nl>,
38 - Philip Edelbrock <phil@netroedge.com>,
39 - Michiel Rook <michiel@grendelproject.nl>,
40 - Grant Coady <gcoady.lk@gmail.com> with guidance
44 ---------
46 chip MSB 5-bit address. Each chip reports a unique manufacturer
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| /Documentation/driver-api/gpio/ |
| D | intro.rst | 16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
17 and is described by all the files in this directory excepted gpio-legacy.txt.
18 - The legacy integer-based interface which is considered deprecated (but still
19 usable for compatibility reasons) is documented in gpio-legacy.txt.
21 The remainder of this document applies to the new descriptor-based interface.
22 gpio-legacy.txt contains the same information applied to the legacy
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
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| /Documentation/devicetree/bindings/net/ |
| D | sff,sfp.txt | 1 Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
6 - compatible : must be one of
10 - i2c-bus : phandle of an I2C bus controller for the SFP two wire serial
15 - mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)
16 module presence input gpio signal, active (module absent) high. Must
19 - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
20 Indication input gpio signal, active (signal lost) high
22 - tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter
23 Fault input gpio signal, active (fault condition) high
25 - tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | ov7670.txt | 3 The Omnivision OV7670 sensor supports multiple resolutions output, such as
5 output formats.
8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
20 Active is high.
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| D | adv7343.txt | 3 The ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP
4 package. Six high speed, 3.3 V, 11-bit video DACs provide support for composite
5 (CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard
6 definition (SD), enhanced definition (ED), or high definition (HD) video
10 - compatible: Must be "adi,adv7343"
13 - adi,power-mode-sleep-mode: on enable the current consumption is reduced to
16 - adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows
19 - ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6,
22 - ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF
38 adi,power-mode-sleep-mode;
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | sprd,pinctrl.txt | 9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 slect 3.0v, then the pin can output 3.0v. "system control" is used
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
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| D | pinctrl-sx150x.txt | 3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
8 - compatible: should be one of :
19 - reg: The I2C slave address for this device.
21 - #gpio-cells: Should be 2. The first cell is the GPIO number and the
25 - gpio-controller: Marks the device as a GPIO controller.
28 - interrupts: Interrupt specifier for the controllers interrupt.
30 - interrupt-controller: Marks the device as a interrupt controller.
32 - semtech,probe-reset: Will trigger a reset of the GPIO expander on probe,
38 Required properties for pin configuration sub-nodes:
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| D | microchip,pic32-pinctrl.txt | 3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
12 - compatible: "microchip,pic32mada-pinctrl"
13 - reg: Address range of the pinctrl registers.
14 - clocks: Clock specifier (see clock bindings for details)
16 Required properties for pin configuration sub-nodes:
17 - pins: List of pins to which the configuration applies.
19 Optional properties for pin configuration sub-nodes:
20 ----------------------------------------------------
21 - function: Mux function for the specified pins.
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| D | sprd,sc9860-pinctrl.txt | 7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
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| D | pinctrl-rk805.txt | 3 RK805 has 2 pins which can be configured as GPIO output only.
5 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
10 --------------------------
13 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
14 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
15 <pinctrl-bindings.txt>.
18 sub-node have following properties:
21 ------------------
22 - #gpio-cells: Should be two. The first cell is the pin number and the
25 - gpio-controller: Marks the device node as a GPIO controller.
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| D | pinctrl-mt6797.txt | 6 - compatible: Value should be one of the following.
7 "mediatek,mt6797-pinctrl", compatible with mt6797 pinctrl.
8 - reg: Should contain address and size for gpio, iocfgl, iocfgb,
10 - reg-names: An array of strings describing the "reg" entries. Must
12 - gpio-controller: Marks the device node as a gpio controller.
13 - #gpio-cells: Should be two. The first cell is the gpio pin number
17 - interrupt-controller: Marks the device node as an interrupt controller.
18 - #interrupt-cells: Should be two.
19 - interrupts : The interrupt outputs from the controller.
21 Please refer to pinctrl-bindings.txt in this directory for details of the
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| /Documentation/devicetree/bindings/power/reset/ |
| D | gpio-poweroff.txt | 9 When the power-off handler is called, the gpio is configured as an
10 output, and drive active, so triggering a level triggered power off
11 condition. This will also cause an inactive->active edge condition, so
13 the GPIO is set to inactive, thus causing an active->inactive edge,
19 - compatible : should be "gpio-poweroff".
20 - gpios : The GPIO to set high/low, see "gpios property" in
23 gpio to "Active High".
26 - input : Initially configure the GPIO line as an input. Only reconfigure
27 it to an output when the power-off handler is called. If this optional
28 property is not specified, the GPIO is initialized as an output in its
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| /Documentation/devicetree/bindings/clock/ |
| D | silabs,si5351.txt | 7 The Si5351a/b/c are programmable i2c clock generators with up to 8 output
8 clocks. Si5351a also has a reduced pin-count package (MSOP10) where only
9 3 output clocks are accessible. The internal structure of the clock
15 - compatible: shall be one of the following:
16 "silabs,si5351a" - Si5351a, QFN20 package
17 "silabs,si5351a-msop" - Si5351a, MSOP10 package
18 "silabs,si5351b" - Si5351b, QFN20 package
19 "silabs,si5351c" - Si5351c, QFN20 package
20 - reg: i2c device address, shall be 0x60 or 0x61.
21 - #clock-cells: from common clock binding; shall be set to 1.
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