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/Documentation/hwmon/
Dmax20751.rst10 Addresses scanned: -
16 Author: Guenter Roeck <linux@roeck-us.net>
20 -----------
30 -----------
32 This driver does not auto-detect devices. You will have to instantiate the
33 devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
38 ---------------------
44 -------------
55 in1_min_alarm Input voltage low alarm.
56 in1_lcrit_alarm Input voltage critical low alarm.
[all …]
Dir38064.rst9 Addresses scanned: -
12 …https://www.infineon.com/dgdl/Infineon-IR38064MTRPBF-DS-v03_07-EN.pdf?fileId=5546d462584d1d4a0158d…
15 - Maxim Sloyko <maxims@google.com>
16 - Patrick Venture <venture@google.com>
19 -----------
21 IR38064 is a Single-input Voltage, Synchronous Buck Regulator, DC-DC Converter.
24 -----------
30 ----------------
34 curr1_input Measured output current
45 in1_min_alarm Input voltage low alarm
[all …]
Dltc2978.rst10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
44 Addresses scanned: -
52 Addresses scanned: -
60 Addresses scanned: -
68 Addresses scanned: -
76 Addresses scanned: -
84 Addresses scanned: -
[all …]
Dds620.rst20 -----------
23 high and low temperature limits which can be user defined (i.e. programmed
24 into non-volatile on-chip registers). Temperature range is -55 degree Celsius
29 (struct ds620_platform_data) .pomode == 0 (default), the thermostat output pin
30 PO is always low. If .pomode == 1, the thermostat is in PO_LOW mode. I.e., the
31 output pin PO becomes active when the temperature falls below temp1_min and
35 output pin becomes active when the temperature goes above temp1_max and stays
38 The PO output pin of the DS620 operates active-low.
Dzl6100.rst10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
42 Addresses scanned: -
50 Addresses scanned: -
58 Addresses scanned: -
66 Addresses scanned: -
74 Addresses scanned: -
82 Addresses scanned: -
[all …]
Dir35221.rst9 Addresses scanned: -
13 Author: Samuel Mendoza-Jonas <sam@mendozajonas.com>
17 -----------
19 IR35221 is a Digital DC-DC Multiphase Converter
23 -----------
32 # echo ir35221 0x70 > /sys/bus/i2c/devices/i2c-4/new_device
36 ----------------
44 curr[2-3]_label "iout[1-2]"
45 curr[2-3]_input Measured output current
46 curr[2-3]_crit Critical maximum current
[all …]
Dinspur-ipsps1.rst1 Kernel driver inspur-ipsps1
11 -----------
17 -----------
19 This driver does not auto-detect devices. You will have to instantiate the
20 devices explicitly. Please see Documentation/i2c/instantiating-devices for
24 -------------
33 curr2_input Measured output current in mA.
44 in1_alarm Input voltage under-voltage alarm.
47 in2_input Measured output voltage in mV.
49 in2_lcrit Critical minimum output voltage
[all …]
Ddme1737.rst18 Addresses scanned: none, address read from Super-I/O config space
34 Addresses scanned: none, address read from Super-I/O config space
43 -----------------
47 and PWM output control functions. Using this parameter
52 Include non-standard LPC addresses 0x162e and 0x164e
55 - VIA EPIA SN18000
59 -----------
63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors
64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
[all …]
Dadm9240.rst10 Addresses scanned: I2C 0x2c - 0x2f
20 Addresses scanned: I2C 0x2c - 0x2f
24 http://pdfserv.maxim-ic.com/en/ds/DS1780.pdf
30 Addresses scanned: I2C 0x2c - 0x2f
37 - Frodo Looijaard <frodol@dds.nl>,
38 - Philip Edelbrock <phil@netroedge.com>,
39 - Michiel Rook <michiel@grendelproject.nl>,
40 - Grant Coady <gcoady.lk@gmail.com> with guidance
44 ---------
46 chip MSB 5-bit address. Each chip reports a unique manufacturer
[all …]
Disl68137.rst10 Addresses scanned: -
18 - Maxim Sloyko <maxims@google.com>
19 - Robert Lippert <rlippert@google.com>
20 - Patrick Venture <venture@google.com>
23 -----------
25 Intersil ISL68137 is a digital output 7-phase configurable PWM
29 -----------
39 ---------------------------
49 curr[2-3]_label "iout[1-2]"
50 curr[2-3]_input Measured output current
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dste,abx500.txt4 - compatible: "stericsson,ab8500-gpio", "stericsson,ab8540-gpio",
5 "stericsson,ab8505-gpio", "stericsson,ab9540-gpio",
7 Please refer to pinctrl-bindings.txt in this directory for details of the
12 and pin configuration bindings, see pinctrl-bindings.txt
17 pinctrl-names = "default";
18 …pinctrl-0 = <&sysclkreq2_default_mode>, <&sysclkreq3_default_mode>, <&gpio3_default_mode>, <&syscl…
28 bias-disable;
40 output-low;
52 output-low;
64 bias-disable;
[all …]
Dmicrochip,pic32-pinctrl.txt3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
12 - compatible: "microchip,pic32mada-pinctrl"
13 - reg: Address range of the pinctrl registers.
14 - clocks: Clock specifier (see clock bindings for details)
16 Required properties for pin configuration sub-nodes:
17 - pins: List of pins to which the configuration applies.
19 Optional properties for pin configuration sub-nodes:
20 ----------------------------------------------------
21 - function: Mux function for the specified pins.
[all …]
Dsprd,sc9860-pinctrl.txt7 - compatible: Must be "sprd,sc9860-pinctrl".
8 - reg: The register address of pin controller device.
9 - pins : An array of strings, each string containing the name of a pin.
12 - function: A string containing the name of the function, values must be
14 - drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
16 - input-schmitt-disable: Enable schmitt-trigger mode.
17 - input-schmitt-enable: Disable schmitt-trigger mode.
18 - bias-disable: Disable pin bias.
19 - bias-pull-down: Pull down on pin.
20 - bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
[all …]
Dsprd,pinctrl.txt9 driving level": One pin can output 3.0v or 1.8v, depending on the
11 slect 3.0v, then the pin can output 3.0v. "system control" is used
16 of them, so we can not make every Spreadtrum-special configuration
35 - input-enable
36 - input-disable
37 - output-high
38 - output-low
39 - bias-pull-up
40 - bias-pull-down
46 and set the pin sleep related configuration as "input-enable", which
[all …]
Dpinctrl-sx150x.txt3 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
4 ../interrupt-controller/interrupts.txt for generic information regarding
8 - compatible: should be one of :
19 - reg: The I2C slave address for this device.
21 - #gpio-cells: Should be 2. The first cell is the GPIO number and the
25 - gpio-controller: Marks the device as a GPIO controller.
28 - interrupts: Interrupt specifier for the controllers interrupt.
30 - interrupt-controller: Marks the device as a interrupt controller.
32 - semtech,probe-reset: Will trigger a reset of the GPIO expander on probe,
38 Required properties for pin configuration sub-nodes:
[all …]
/Documentation/devicetree/bindings/power/supply/
Dmax8903-charger.txt4 - compatible: "maxim,max8903" for MAX8903 Battery Charger
5 - dok-gpios: Valid DC power has been detected (active low, input), optional if uok-gpios is provided
6 - uok-gpios: Valid USB power has been detected (active low, input), optional if dok-gpios is provid…
9 - cen-gpios: Charge enable pin (active low, output)
10 - chg-gpios: Charger status pin (active low, input)
11 - flt-gpios: Fault pin (active low, output)
12 - dcm-gpios: Current limit mode setting (DC=1 or USB=0, output)
13 - usus-gpios: USB suspend pin (active high, output)
18 max8903-charger {
20 dok-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
[all …]
Dlt3651-charger.txt1 Analog Devices LT3651 Charger Power Supply bindings: lt3651-charger
4 - compatible: Should contain one of the following:
5 * "lltc,ltc3651-charger", (DEPRECATED: Use "lltc,lt3651-charger")
6 * "lltc,lt3651-charger"
7 - lltc,acpr-gpios: Connect to ACPR output. See remark below.
10 - lltc,fault-gpios: Connect to FAULT output. See remark below.
11 - lltc,chrg-gpios: Connect to CHRG output. See remark below.
13 The lt3651 outputs are open-drain type and active low. The driver assumes the
14 GPIO reports "active" when the output is asserted, so if the pins have been
15 connected directly, the GPIO flags should be set to active low also.
[all …]
/Documentation/driver-api/gpio/
Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
17 and is described by all the files in this directory excepted gpio-legacy.txt.
18 - The legacy integer-based interface which is considered deprecated (but still
19 usable for compatibility reasons) is documented in gpio-legacy.txt.
21 The remainder of this document applies to the new descriptor-based interface.
22 gpio-legacy.txt contains the same information applied to the legacy
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
[all …]
/Documentation/devicetree/bindings/iio/timer/
Dstm32-lptimer-trigger.txt1 STMicroelectronics STM32 Low-Power Timer Trigger
3 STM32 Low-Power Timer provides trigger source (LPTIM output) that can be used
6 Must be a sub-node of an STM32 Low-Power Timer device tree node.
7 See ../mfd/stm32-lptimer.txt for details about the parent node.
10 - compatible: Must be "st,stm32-lptimer-trigger".
11 - reg: Identify trigger hardware block. Must be 0, 1 or 2
13 trigger output.
17 compatible = "st,stm32-lptimer";
20 compatible = "st,stm32-lptimer-trigger";
/Documentation/devicetree/bindings/iio/frequency/
Dadf4350.txt4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dov7670.txt3 The Omnivision OV7670 sensor supports multiple resolutions output, such as
5 output formats.
8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
18 Active is low.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
[all …]
Daptina,mt9v111.txt2 ----------------------------
4 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
7 The sensor has an active pixel array of 640x480 pixels and can output a number
8 of image resolution and formats controllable through a simple two-wires
12 --------------------
14 - compatible: shall be "aptina,mt9v111".
15 - clocks: reference to the system clock input provider.
18 --------------------
20 - enable-gpios: output enable signal, pin name "OE#". Active low.
21 - standby-gpios: low power state control signal, pin name "STANDBY".
[all …]
Dst,st-mipid02.txt1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a
4 time. Active port input stream will be de-serialized and its content outputted
5 through PARALLEL output port.
6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second
9 PARALLEL output port has a maximum width of 12 bits.
11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.
14 - compatible: shall be "st,st-mipid02"
15 - clocks: reference to the xclk input clock.
16 - clock-names: shall be "xclk".
[all …]
/Documentation/devicetree/bindings/power/reset/
Dgpio-poweroff.txt9 When the power-off handler is called, the gpio is configured as an
10 output, and drive active, so triggering a level triggered power off
11 condition. This will also cause an inactive->active edge condition, so
13 the GPIO is set to inactive, thus causing an active->inactive edge,
19 - compatible : should be "gpio-poweroff".
20 - gpios : The GPIO to set high/low, see "gpios property" in
22 low to power down the board set it to "Active Low", otherwise set
26 - input : Initially configure the GPIO line as an input. Only reconfigure
27 it to an output when the power-off handler is called. If this optional
28 property is not specified, the GPIO is initialized as an output in its
[all …]
/Documentation/devicetree/bindings/clock/ti/
Ddpll.txt3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped DPLL with usually two selectable input clocks
8 loop logic for multiplying the input clock to a desired output
10 modes (locked, low power stop etc.) This binding has several
11 sub-types, which effectively result in slightly different setup
14 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
17 - compatible : shall be one of:
18 "ti,omap3-dpll-clock",
19 "ti,omap3-dpll-core-clock",
20 "ti,omap3-dpll-per-clock",
[all …]

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