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/Documentation/media/uapi/mediactl/
Dmedia-ioc-enum-links.rst19 MEDIA_IOC_ENUM_LINKS - Enumerate all pads and links for a given entity
42 To enumerate pads and/or links for a given entity, applications set the
47 the ``pads`` and ``links`` fields. They then call the
50 If the ``pads`` field is not NULL, the driver fills the ``pads`` array
51 with information about the entity's pads. The array must have enough
52 room to store all the entity's pads. The number of pads can be retrieved
60 Only forward links that originate at one of the entity's source pads are
78 - \*\ ``pads``
79 - Pointer to a pads array allocated by the application. Ignored if
Dmedia-controller-model.rst34 inputs. Pads should not be confused with physical pins at chip
38 pads, either on the same entity or on different entities. Data flows
Dmedia-ioc-g-topology.rst46 ``topology_version`` and the total number of entities, interfaces, pads
104 - Total number of pads in the graph
112 - A pointer to a memory area where the pads array will be stored,
114 won't store the pads. It will just update ``num_pads``
/Documentation/devicetree/bindings/display/
Darm,pl11x.txt48 - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
49 defining the way CLD pads are wired up; first value
58 arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
60 arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
62 arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
64 arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
66 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
68 arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
/Documentation/media/uapi/v4l/
Ddev-subdev.rst25 and discover the hardware topology using the media entities, pads and
37 - negotiate image formats on individual pads
133 whole pipeline and making sure that connected pads have compatible
147 Acceptable formats on pads can (and usually do) depend on a number of
148 external parameters, such as formats on other pads, active links, or
149 even controls. Finding a combination of formats on all pads in a video
182 (as long as external parameters, such as formats on other pads or links'
186 or active format is set on a pad, corresponding formats on other pads of
191 - Formats should be propagated from sink pads to source pads. Modifying
196 reset the scale factors to default values when sink pads formats are
[all …]
Dext-ctrls-dv.rst26 Note that these devices can have multiple input or output pads which are
28 receive or transmit video from/to only one of those pads, the other pads
35 These pads appear in several of the controls in this section as
37 1, etc. The maximum value of the control is the set of valid pads.
/Documentation/media/kapi/
Dmc-core.rst19 through pads.
29 flows from the entity's output to one or more entity inputs. Pads should
32 A link is a point-to-point oriented connection between two pads, either
58 Drivers initialize entity pads by calling
80 Pads chapter
82 Pads are represented by a struct :c:type:`media_pad` instance,
83 defined in ``include/media/media-entity.h``. Each entity stores its pads in
84 a pads array managed by the entity driver. Drivers usually embed the array in
87 Pads are identified by their entity and their 0-based index in the pads
94 Pads have flags that describe the pad capabilities and state.
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/Documentation/devicetree/bindings/ata/
Dcortina,gemini-sata-bridge.txt20 ata0 slave interface brought out on IDE pads
23 ata1 slave interface brought out on IDE pads
27 on IDE pads
31 on IDE pads
/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra124-dpaux-padctl.txt21 needed to describe the pin mux'ing options for the DPAUX pads.
23 single set of pads, the child nodes only need to describe the pad group
24 the functions are being applied to rather than the individual pads.
Dfsl,imx7d-pinctrl.txt22 Peripherals using pads from iomuxc-lpsr support low state retention power
23 state, under LPSR mode GPIO's state of pads are retain.
57 advantages of LPSR power mode, is also possible that an IP to use pads from
Dnvidia,tegra124-xusb-padctl.txt11 assigned to one out of a set of different pads. Some of these pads have an
40 Each subnode describes groups of lanes along with parameters and pads that
/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra114-mipi.txt10 - #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads
14 phandle to refer to the calibration controller node and a bitmask of the pads
/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt17 "pads": PADS registers
183 reg = <0x80003000 0x00000800 /* PADS registers */
186 reg-names = "pads", "afi", "cs";
284 reg = <0x00003000 0x00000800 /* PADS registers */
287 reg-names = "pads", "afi", "cs";
389 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
392 reg-names = "pads", "afi", "cs";
464 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
471 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
485 reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
[all …]
/Documentation/media/v4l-drivers/
Dimx.rst113 four source pads, corresponding to the four MIPI CSI-2 demuxed virtual
114 channel outputs. Multiple source pads can be enabled to independently
136 These are the video multiplexers. They have two or more sink pads to
143 the four MIPI CSI-2 virtual channels (a total of five sink pads). The
144 other mux sits in front of IPU1-CSI1, and again has five sink pads to
150 channel 0 (two sink pads). The other mux sits in front of IPU2-CSI1 to
152 sink pads).
161 This entity has two source pads. The first source pad can link directly
235 sink and source pads. The ipuX_csiY entity then applies the best
314 to one of the i.MX6 input capture channel pads.
[all …]
Dimx7.rst47 This is the video multiplexer. It has two sink pads to select from either camera
88 # Configure pads for pipeline
113 - entity 1: csi (2 pads, 2 links)
129 - entity 10: csi-mux (3 pads, 2 links)
141 - entity 14: imx7-mipi-csis.0 (2 pads, 2 links)
/Documentation/devicetree/bindings/interrupt-controller/
Damlogic,meson-gpio-intc.txt4 pads and generate an interrupt on edge or level. The controller is essentially
5 a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra186-pmc.txt56 The following pads are present on Tegra186:
80 Note: The power state can be configured on all of the above pads except
81 for ao-hv. Following pads have software configurable signaling
Dnvidia,tegra20-pmc.txt215 The following pads are present on Tegra124 and Tegra132:
225 The following pads are present on Tegra210:
249 Tegra132 pads. None of the Tegra124 or Tegra132 pads support
252 Note: All of the listed Tegra210 pads except pex-cntrl support power
254 following Tegra210 pads: audio, audio-hv, cam, dbg, dmic, gpio,
/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt5 signals) which connect directly to pins/pads on the SoC package. Each lane
20 Pads will be represented as children of the top-level XUSB pad controller
69 A required child node named "pads" contains a list of subnodes, one for each
70 of the pads exposed by the XUSB pad controller. Each pad may need additional
77 For Tegra124 and Tegra132, the following pads exist: usb2, ulpi, hsic, pcie
78 and sata. No extra resources are required for operation of these pads.
80 For Tegra210, the following pads exist: usb2, hsic, pcie and sata. Below is
255 pads {
387 pads {
483 pads {
[all …]
Dnvidia,tegra20-usb-phy.txt22 - utmi-pads: The clock needed to access the UTMI pad control registers.
32 - utmi-pads: The reset of the PHY containing the chip-wide UTMI pad control
/Documentation/input/devices/
Dxpad.rst29 pads" (module option dpad_to_buttons)
36 dpad_to_buttons has no effect for known pads. A erroneous commit message
63 Xbox Dance Pads
68 For dance style pads (like the redoctane pad) several changes
73 Known dance pads automatically map the d-pad to buttons and will work
231 - added stuff for dance pads, new d-pad->axes mappings
Djoystick-parport.rst59 for your pads, use either keyboard or joystick port, and make a pass-through
71 Unfortunately, there are pads that need a lot more of power, and parallel
92 NES and SNES pads have two input bits, Clock and Latch, which drive the
278 want to use them on one parallel port together with NES/SNES/PSX pads. This is
305 for the NES / SNES pads in section 2.1 of this file - that is, one data pin
387 The Sega Genesis (in Europe sold as Sega MegaDrive) pads are an extension
388 to the Sega Master System pads. They use more buttons (3+1, 5+1, 6+1). Use
417 Genesis 6 pads use, it needs one more select pin. Anyway, it is still
487 described above, allows to connect a different group of joysticks and pads.
528 work but you can try lowering it for better performance. If your pads don't
[all …]
/Documentation/devicetree/bindings/usb/
Dnvidia,tegra124-xusb.txt43 configure the USB pads used by the XHCI controller
119 phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */
120 <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */
121 <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */
/Documentation/devicetree/bindings/display/panel/
Dti,nspire.yaml33 remote-endpoint = <&pads>;
/Documentation/devicetree/bindings/regulator/
Dpbias-regulator.txt1 PBIAS internal regulator for SD card dual voltage i/o pads on OMAP SoCs.

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