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/Documentation/devicetree/bindings/arm/marvell/
Dcoherency-fabric.txt21 * For "marvell,coherency-fabric", the first pair for the coherency
22 fabric registers, second pair for the per-CPU fabric registers.
24 * For "marvell,armada-375-coherency-fabric", only one pair is needed
27 * For "marvell,armada-380-coherency-fabric", only one pair is needed
/Documentation/devicetree/bindings/phy/
Drcar-gen3-phy-pcie.txt10 - clocks: clock phandle and specifier pair.
11 - power-domains: power domain phandle and specifier pair.
12 - resets: reset phandle and specifier pair.
Dphy-hisi-inno-usb2.txt9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device
11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset
23 - resets: The phandle and reset specifier pair for PHY port reset signal.
Dbrcm,brcmstb-usb-phy.txt6 The first pair specifies a manditory set of memory mapped
8 The second pair specifies optional registers used by some of
Dphy-hi3798cv200-combphy.txt10 - clocks: The phandle to clock provider and clock specifier pair.
11 - resets: The phandle to reset controller and reset specifier pair.
/Documentation/devicetree/bindings/interrupt-controller/
Dmarvell,armada-370-xp-mpic.txt12 - reg: Should contain PMIC registers location and length. First pair
13 for the main interrupt registers, second pair for the per-CPU
14 interrupt registers. For this last pair, to be compliant with SMP
/Documentation/devicetree/bindings/media/
Drenesas,imr.txt18 - clocks: single clock phandle/specifier pair;
19 - power-domains: power domain phandle/specifier pair;
20 - resets: reset phandle/specifier pair.
/Documentation/livepatch/
Dshadow-vars.rst27 stored and retrieved through a <obj, id> pair.
49 - search hashtable for <obj, id> pair
52 - search hashtable for <obj, id> pair
65 - search hashtable for <obj, id> pair
75 - add <obj, id> pair to the global hashtable
117 for this <obj, id> pair.)
198 will use one that was already created for this <obj, id> pair.
/Documentation/ABI/testing/
Dsysfs-bus-counter121 If direction is forward, rising edges on quadrature pair
123 is backward, falling edges on quadrature pair signal A
128 If direction is forward, rising edges on quadrature pair
130 is backward, falling edges on quadrature pair signal B
135 Any state transition on quadrature pair signal A updates
140 Any state transition on quadrature pair signal B updates
145 Any state transition on either quadrature pair signals
Dsysfs-uevent30 It's possible to define zero or more pairs - each pair is then
31 delimited by a space character ' '. Each pair appears in
Dsysfs-platform-dell-smbios9 Each token attribute is available as a pair of
/Documentation/i2c/busses/
Di2c-ismt.rst37 The S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers
40 The S12xx series contain a pair of PCI functions. An output of lspci will show
/Documentation/devicetree/bindings/usb/
Drenesas,usb3-peri.txt20 - clocks: clock phandle and specifier pair
23 - phys: phandle + phy specifier pair
/Documentation/devicetree/bindings/iio/
Diio-bindings.txt6 nodes use a phandle and IIO specifier pair to connect IIO provider
48 io-channels: List of phandle and IIO specifier pairs, one pair
51 then only the phandle portion of the pair will appear.
/Documentation/devicetree/bindings/timer/
Dmarvell,armada-370-xp-timer.txt12 pair for the Global Timer registers, second pair for the
/Documentation/infiniband/
Dtag_matching.rst14 The ordering rules require that when more than one pair of send and receive
15 message envelopes may match, the pair that includes the earliest posted-send
16 and the earliest posted-receive is the pair that must be used to satisfy the
/Documentation/driver-api/
Dgeneric-counter.rst62 A pair of quadrature encoding signals are evaluated to determine
66 If direction is forward, rising edges on quadrature pair signal A
68 edges on quadrature pair signal A updates the respective count.
72 If direction is forward, rising edges on quadrature pair signal B
74 edges on quadrature pair signal B updates the respective count.
78 Any state transition on quadrature pair signal A updates the
82 Any state transition on quadrature pair signal B updates the
86 Any state transition on either quadrature pair signals updates the
/Documentation/devicetree/bindings/ata/
Dahci-mtk.txt14 - phys : A phandle and PHY specifier pair for the PHY port.
19 - power-domains : A phandle and power domain specifier pair to the power
/Documentation/devicetree/bindings/power/reset/
Dkeystone-reset.txt16 - ti,syscon-pll: phandle/offset pair. The phandle to syscon used to
20 - ti,syscon-dev: phandle/offset pair. The phandle to syscon used to
/Documentation/devicetree/bindings/gpio/
Dnxp,lpc1850-gpio.txt10 - clocks : Phandle and clock specifier pair for GPIO controller
11 - resets : Phandle and reset specifier pair for GPIO controller
/Documentation/devicetree/bindings/soc/bcm/
Dbrcm,bcm2835-vchiq.txt7 - reg: Physical base address and length of the doorbell register pair
/Documentation/devicetree/bindings/sound/
Dwidgets.txt5 Each entry is a pair of strings in DT:
/Documentation/devicetree/bindings/rng/
Dsamsung,exynos4-rng.txt9 - clocks : Phandle to clock-controller plus clock-specifier pair.
Dapm,rng.txt7 - clocks : phandle to clock-controller plus clock-specifier pair
/Documentation/devicetree/bindings/clock/
Dclock-bindings.txt6 nodes use a phandle and clock specifier pair to connect clock provider
66 clocks: List of phandle and clock specifier pairs, one pair
69 only the phandle portion of the pair will appear.
141 clocks in the form of a phandle and clock specifier pair and the

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