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/Documentation/devicetree/bindings/media/
Dqcom,venus.txt21 Definition: A List of phandle and clock specifier pairs as listed
41 Definition: A phandle and power domain specifier pairs to the
47 Definition: A list of phandle and IOMMU specifier pairs.
68 Definition: A List of phandle and clock specifier pairs as listed
79 Definition: A phandle and power domain specifier pairs to the
88 Definition: A list of phandle and IOMMU specifier pairs.
Dqcom,camss.txt54 Definition: A phandle and power domain specifier pairs to the
60 Definition: A list of phandle and clock specifier pairs as listed
109 Definition: A list of phandle and IOMMU specifier pairs.
/Documentation/locking/
Dlocktorture.rst53 spin_lock() and spin_unlock() pairs.
56 spin_lock_irq() and spin_unlock_irq() pairs.
59 read/write lock() and unlock() rwlock pairs.
63 rwlock pairs.
66 mutex_lock() and mutex_unlock() pairs.
69 rtmutex_lock() and rtmutex_unlock() pairs.
73 read/write down() and up() semaphore pairs.
/Documentation/devicetree/bindings/usb/
Dhisilicon,histb-xhci.txt9 - clocks: a list of phandle + clock-specifier pairs, one for each
16 - resets: a list of phandle and reset specifier pairs as listed in
20 - phys: a list of phandle + phy specifier pairs
/Documentation/ABI/testing/
Dsysfs-uevent16 You need to pass UUID first before any KEY=VALUE pairs.
29 The KEY=VALUE pairs can contain alphanumeric characters only.
30 It's possible to define zero or more pairs - each pair is then
/Documentation/devicetree/bindings/sound/
Dsirf-audio-port.txt6 - dmas: List of DMA controller phandle and DMA request line ordered pairs.
8 These strings correspond 1:1 with the ordered pairs in dmas.
Dbrcm,bcm2835-i2s.txt7 - dmas: List of DMA controller phandle and DMA request line ordered pairs.
9 These strings correspond 1:1 with the ordered pairs in dmas.
Dsprd-pcm.txt5 - dmas: Specify the list of DMA controller phandle and DMA request line ordered pairs.
7 These strings correspond 1:1 with the ordered pairs in dmas.
Dzte,zx-spdif.txt6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
8 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
Dsirf-usp.txt6 - dmas: List of DMA controller phandle and DMA request line ordered pairs.
8 These strings correspond 1:1 with the ordered pairs in dmas.
Dadi,axi-spdif-tx.txt6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
11 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
Ddesignware-i2s.txt6 - clocks : Pairs of phandle and specifier referencing the controller's
10 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
Dadi,axi-i2s.txt9 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
14 - dmas: Pairs of phandle and specifier for the DMA channels that are used by
Dzte,zx-i2s.txt8 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
10 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm3380-l2-intc.txt8 - contains one or more enable/status word pairs, which often appear at
16 - reg: specifies one or more enable/status pairs, in the following format:
/Documentation/devicetree/bindings/phy/
Dsun9i-usb-phy.txt7 - reg : a list of offset + length pairs
15 - resets : a list of phandle + reset specifier pairs
Dqcom-qmp-phy.txt35 - clocks: a list of phandles and clock-specifier pairs,
61 - resets: a list of phandles and reset controller specifier pairs,
99 - reg: list of offset and length pairs of register sets for PHY blocks -
104 - reg: list of offset and length pairs of register sets for PHY blocks
112 - clocks: a list of phandles and clock-specifier pairs,
128 - resets: a list of phandles and reset controller specifier pairs,
Dsun4i-usb-phy.txt18 - reg : a list of offset + length pairs
34 - resets : a list of phandle + reset specifier pairs
/Documentation/devicetree/bindings/interconnect/
Dinterconnect.txt45 interconnects : Pairs of phandles and interconnect provider specifier to denote
52 specifier pairs.
/Documentation/devicetree/bindings/display/hisilicon/
Dhisi-ade.txt13 - clocks: a list of phandle + clock-specifier pairs, one for each entry
21 phandle + clock-specifier pairs.
/Documentation/devicetree/bindings/pci/
Dhisilicon-histb-pcie.txt21 - clocks: List of phandle and clock specifier pairs as listed in clock-names
28 - resets: List of phandle and reset specifier pairs as listed in reset-names
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,glink.txt4 communication between subsystem-pairs on various Qualcomm platforms. Two types
55 Definition: a list of size,amount pairs describing what intents should
/Documentation/devicetree/bindings/display/
Darm,komeda.txt7 - clocks: A list of phandle + clock-specifier pairs, one for each entry
22 - clocks: A list of phandle + clock-specifier pairs, one for each entry
/Documentation/devicetree/bindings/ata/
Dahci-platform.txt32 - clocks : a list of phandle + clock specifier pairs
33 - resets : a list of phandle + reset specifier pairs
/Documentation/devicetree/bindings/power/supply/
Dda9150-charger.txt7 - io-channels: List of phandle and IIO specifier pairs

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