Searched +full:power +full:- +full:domains (Results 1 – 25 of 153) sorted by relevance
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| /Documentation/devicetree/bindings/power/ |
| D | power_domain.txt | 1 * Generic PM domains
3 System on chip designs are often divided into multiple PM domains that can be
4 used for power gating of selected IP blocks for power saving by reduced leakage
8 their PM domains provided by PM domain providers. A PM domain provider can be
10 domains. A consumer node can refer to the provider by a phandle and a set of
12 #power-domain-cells property in the PM domain provider node.
17 - #power-domain-cells : Number of cells in a PM domain specifier;
19 providing multiple PM domains (e.g. power controllers), but can be any value
23 - power-domains : A phandle and PM domain specifier as defined by bindings of
24 the power controller specified by phandle.
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| D | pd-samsung.txt | 1 * Samsung Exynos Power Domains
3 Exynos processors include support for multiple power domains which are used
4 to gate power to one or more peripherals on the processor.
7 - compatible: should be one of the following.
8 * samsung,exynos4210-pd - for exynos4210 type power domain.
9 * samsung,exynos5433-pd - for exynos5433 type power domain.
10 - reg: physical base address of the controller and length of memory mapped
12 - #power-domain-cells: number of cells in power domain specifier;
16 - label: Human readable string with domain name. Will be visible in userspace
17 to let user to distinguish between multiple domains in SoC.
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| D | fsl,imx-gpcv2.txt | 1 Freescale i.MX General Power Controller v2
4 The i.MX7S/D General Power Control (GPC) block contains Power Gating
5 Control (PGC) for various power domains.
9 - compatible: Should be one of:
10 - "fsl,imx7d-gpc"
11 - "fsl,imx8mq-gpc"
13 - reg: should be register base and length as documented in the
16 - interrupts: Should contain GPC interrupt request 1
18 Power domains contained within GPC node are generic power domain
20 Documentation/devicetree/bindings/power/power_domain.txt, which are
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| D | renesas,sysc-rmobile.txt | 1 DT bindings for the Renesas R-Mobile System Controller
5 The R-Mobile System Controller provides the following functions:
6 - Boot mode management,
7 - Reset generation,
8 - Power management.
11 - compatible: Should be "renesas,sysc-<soctype>", "renesas,sysc-rmobile" as
14 - "renesas,sysc-r8a73a4" (R-Mobile APE6)
15 - "renesas,sysc-r8a7740" (R-Mobile A1)
16 - "renesas,sysc-sh73a0" (SH-Mobile AG5)
17 - reg: Two address start and address range blocks for the device:
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| D | qcom,rpmpd.txt | 1 Qualcomm RPM/RPMh Power domains
3 For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh
7 - compatible: Should be one of the following
8 * qcom,msm8996-rpmpd: RPM Power domain for the msm8996 family of SoC
9 * qcom,msm8998-rpmpd: RPM Power domain for the msm8998 family of SoC
10 * qcom,qcs404-rpmpd: RPM Power domain for the qcs404 family of SoC
11 * qcom,sdm845-rpmhpd: RPMh Power domain for the sdm845 family of SoC
12 - #power-domain-cells: number of cells in Power domain specifier
14 - operating-points-v2: Phandle to the OPP table for the Power domain.
15 Refer to Documentation/devicetree/bindings/power/power_domain.txt
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| D | fsl,imx-gpc.txt | 1 Freescale i.MX General Power Controller
4 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
5 counters and Power Gating Control (PGC).
8 - compatible: Should be one of the following:
9 - fsl,imx6q-gpc
10 - fsl,imx6qp-gpc
11 - fsl,imx6sl-gpc
12 - fsl,imx6sx-gpc
13 - reg: should be register base and length as documented in the
15 - interrupts: Should contain one interrupt specifier for the GPC interrupt
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| D | xlnx,zynqmp-genpd.txt | 1 -----------------------------------------------------------
2 Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
3 -----------------------------------------------------------
4 The binding for zynqmp-power-controller follow the common
7 [1] Documentation/devicetree/bindings/power/power_domain.txt
12 - Below property should be in zynqmp-firmware node.
13 - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.
15 Power domain ID indexes are mentioned in
16 include/dt-bindings/power/xlnx-zynqmp-power.h.
18 -------
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| /Documentation/devicetree/bindings/arm/ux500/ |
| D | power_domain.txt | 1 * ST-Ericsson UX500 PM Domains
3 UX500 supports multiple PM domains which are used to gate power to one or
6 The implementation of PM domains for UX500 are based upon the generic PM domain
12 - compatible: Must be "stericsson,ux500-pm-domains".
13 - #power-domain-cells : Number of cells in a power domain specifier, must be 1.
17 compatible = "stericsson,ux500-pm-domains";
18 #power-domain-cells = <1>;
24 - power-domains: A phandle and PM domain specifier. Below are the list of
28 ----- ---------
34 power-domains = <&pm_domains DOMAIN_VAPE>
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| /Documentation/devicetree/bindings/media/ |
| D | mediatek-mdp.txt | 6 - compatible: "mediatek,mt8173-mdp"
7 - mediatek,vpu: the node of video processor unit, see
8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details.
11 - compatible: Should be one of
12 "mediatek,mt8173-mdp-rdma" - read DMA
13 "mediatek,mt8173-mdp-rsz" - resizer
14 "mediatek,mt8173-mdp-wdma" - write DMA
15 "mediatek,mt8173-mdp-wrot" - write DMA with rotation
16 - reg: Physical base address and length of the function block register space
17 - clocks: device clocks, see
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| D | qcom,venus.txt | 3 - compatible:
7 - "qcom,msm8916-venus"
8 - "qcom,msm8996-venus"
9 - "qcom,sdm845-venus"
10 - reg:
12 Value type: <prop-encoded-array>
14 - interrupts:
16 Value type: <prop-encoded-array>
18 - clocks:
20 Value type: <prop-encoded-array>
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| D | rockchip-vpu.txt | 1 device-tree bindings for rockchip VPU codec
7 - compatible: value should be one of the following
8 "rockchip,rk3288-vpu";
9 "rockchip,rk3328-vpu";
10 "rockchip,rk3399-vpu";
11 - interrupts: encoding and decoding interrupt specifiers
12 - interrupt-names: should be
15 - clocks: phandle to VPU aclk, hclk clocks
16 - clock-names: should be "aclk" and "hclk"
17 - power-domains: phandle to power domain node
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| /Documentation/devicetree/bindings/soc/rockchip/ |
| D | power_domain.txt | 1 * Rockchip Power Domains
3 Rockchip processors include support for multiple power domains which can be
4 powered up/down by software based on different application scenes to save power.
6 Required properties for power domain controller:
7 - compatible: Should be one of the following.
8 "rockchip,px30-power-controller" - for PX30 SoCs.
9 "rockchip,rk3036-power-controller" - for RK3036 SoCs.
10 "rockchip,rk3066-power-controller" - for RK3066 SoCs.
11 "rockchip,rk3128-power-controller" - for RK3128 SoCs.
12 "rockchip,rk3188-power-controller" - for RK3188 SoCs.
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| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,disp.txt | 29 - compatible: "mediatek,<chip>-disp-<function>", one of
30 "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
31 "mediatek,<chip>-disp-rdma" - read DMA / line buffer
32 "mediatek,<chip>-disp-wdma" - write DMA
33 "mediatek,<chip>-disp-color" - color processor
34 "mediatek,<chip>-disp-aal" - adaptive ambient light controller
35 "mediatek,<chip>-disp-gamma" - gamma correction
36 "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
37 "mediatek,<chip>-disp-split" - split stream to two encoders
38 "mediatek,<chip>-disp-ufoe" - data compression engine
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| /Documentation/devicetree/bindings/soc/bcm/ |
| D | raspberrypi,bcm2835-power.txt | 1 Raspberry Pi power domain driver
5 - compatible: Should be "raspberrypi,bcm2835-power".
6 - firmware: Reference to the RPi firmware device node.
7 - #power-domain-cells: Should be <1>, we providing multiple power domains.
9 The valid defines for power domain are:
37 power: power {
38 compatible = "raspberrypi,bcm2835-power";
40 #power-domain-cells = <1>;
43 Example for using power domain:
46 power-domains = <&power RPI_POWER_DOMAIN_USB>;
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| /Documentation/devicetree/bindings/arm/ |
| D | arm,scpi.txt | 1 System Control and Power Interface (SCPI) Message Protocol
2 ----------------------------------------------------------
6 by Linux to initiate various system control and power operations.
10 - compatible : should be
12 * "arm,scpi-pre-1.0" : For implementations complying to all
14 - mboxes: List of phandle and mailbox channel specifiers
17 - shmem : List of phandle pointing to the shared memory(SHM) area between the
27 ------------------------------------------------------------
34 - compatible : should be "arm,scpi-clocks"
36 protocol much be listed as sub-nodes under this node.
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| /Documentation/devicetree/bindings/soc/zte/ |
| D | pd-2967xx.txt | 1 * ZTE zx2967 family Power Domains
3 zx2967 family includes support for multiple power domains which are used
4 to gate power to one or more peripherals on the processor.
7 - compatible: should be one of the following.
8 * zte,zx296718-pcu - for zx296718 power domain.
9 - reg: physical base address of the controller and length of memory mapped
11 - #power-domain-cells: Must be 1.
16 compatible = "zte,zx296718-pcu";
18 #power-domain-cells = <1>;
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| /Documentation/devicetree/bindings/display/msm/ |
| D | gmu.txt | 3 The GMU is a programmable power controller for the GPU. the CPU controls the
4 GMU which in turn handles power controls for the GPU.
7 - compatible: "qcom,adreno-gmu-XYZ.W", "qcom,adreno-gmu"
8 for example: "qcom,adreno-gmu-630.2", "qcom,adreno-gmu"
9 Note that you need to list the less specific "qcom,adreno-gmu"
12 - reg: Physical base address and length of the GMU registers.
13 - reg-names: Matching names for the register regions
17 - interrupts: The interrupt signals from the GMU.
18 - interrupt-names: Matching names for the interrupts
21 - clocks: phandles to the device clocks
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| D | hdmi.txt | 4 - compatible: one of the following
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
13 - interrupts: The interrupt signal from the hdmi block.
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| /Documentation/devicetree/bindings/soc/dove/ |
| D | pmu.txt | 4 - compatible: value should be "marvell,dove-pmu".
5 May also include "simple-bus" if there are child devices, in which
7 - reg: two base addresses and sizes of the PM controller and PMU.
8 - interrupts: single interrupt number for the PMU interrupt
9 - interrupt-controller: must be specified as the PMU itself is an
11 - #interrupt-cells: must be 1.
12 - #reset-cells: must be 1.
13 - domains: sub-node containing domain descriptions
16 - ranges: defines the address mapping for child devices, as per the
18 "simple-bus".
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| /Documentation/devicetree/bindings/soc/mediatek/ |
| D | scpsys.txt | 4 The System Control Processor System (SCPSYS) has several power management
7 The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power
11 power/power_domain.txt. It provides the power domains defined in
12 - include/dt-bindings/power/mt8173-power.h
13 - include/dt-bindings/power/mt6797-power.h
14 - include/dt-bindings/power/mt2701-power.h
15 - include/dt-bindings/power/mt2712-power.h
16 - include/dt-bindings/power/mt7622-power.h
19 - compatible: Should be one of:
20 - "mediatek,mt2701-scpsys"
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| /Documentation/power/ |
| D | energy-model.rst | 6 -----------
9 the power consumed by CPUs at various performance levels, and the kernel
10 subsystems willing to use that information to make energy-aware decisions.
12 The source of the information about the power consumed by CPUs can vary greatly
13 from one platform to another. These power costs can be estimated using
16 each and every client subsystem to re-implement support for each and every
18 abstraction layer which standardizes the format of power cost tables in the
21 The figure below depicts an example of drivers (Arm-specific here, but the
22 approach is applicable to any architecture) providing power costs to the EM
25 +---------------+ +-----------------+ +---------------+
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | mediatek,smi-larb.txt | 6 - compatible : must be one of :
7 "mediatek,mt2701-smi-larb"
8 "mediatek,mt2712-smi-larb"
9 "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb"
10 "mediatek,mt8173-smi-larb"
11 "mediatek,mt8183-smi-larb"
12 - reg : the register and size of this local arbiter.
13 - mediatek,smi : a phandle to the smi_common node.
14 - power-domains : a phandle to the power domain of this local arbiter.
15 - clocks : Must contain an entry for each entry in clock-names.
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| /Documentation/devicetree/bindings/sound/ |
| D | mt8183-afe-pcm.txt | 4 - compatible = "mediatek,mt68183-audio";
5 - reg: register location and size
6 - interrupts: should contain AFE interrupt
7 - power-domains: should define the power domain
8 - clocks: Must contain an entry for each entry in clock-names
9 - clock-names: should have these clock names:
19 afe: mt8183-afe-pcm@11220000 {
20 compatible = "mediatek,mt8183-audio";
23 power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>;
30 clock-names = "infra_sys_audio_clk",
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | sci-pm-domain.txt | 1 Texas Instruments TI-SCI Generic Power Domain
2 ---------------------------------------------
7 controller happens through a protocol known as TI-SCI [1].
15 bindings in Documentation/devicetree/bindings/power/power_domain.txt. Because
20 --------------------
21 - compatible: should be "ti,sci-pm-domain"
22 - #power-domain-cells: Can be one of the following:
33 -------------
35 compatible = "ti,k2g-sci";
38 k2g_pds: power-controller {
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| /Documentation/devicetree/bindings/phy/ |
| D | rcar-gen3-phy-pcie.txt | 1 * Renesas R-Car generation 3 PCIe PHY
3 This file provides information on what the device node for the R-Car
7 - compatible: "renesas,r8a77980-pcie-phy" if the device is a part of the
9 - reg: offset and length of the register block.
10 - clocks: clock phandle and specifier pair.
11 - power-domains: power domain phandle and specifier pair.
12 - resets: reset phandle and specifier pair.
13 - #phy-cells: see phy-bindings.txt in the same directory, must be <0>.
15 Example (R-Car V3H):
17 pcie-phy@e65d0000 {
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