Searched +full:power +full:- +full:down (Results 1 – 25 of 223) sorted by relevance
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| /Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,idle-state.txt | 3 ARM provides idle-state node to define the cpuidle states, as defined in [1].
4 cpuidle-qcom is the cpuidle driver for Qualcomm SoCs and uses these idle
6 The idle states supported by the QCOM SoC are defined as -
10 * Standalone Power Collapse (Standalone PC or SPC)
11 * Power Collapse (PC)
26 Retention: Retention is a low power state where the core is clock gated and
33 Standalone PC: A cpu can power down and warmboot if there is a sufficient time
35 to indicate a core entering a power down state without consulting any other
36 cpu or the system resources. This helps save power only on that core. The SPM
37 sequence for this idle state is programmed to power down the supply to the
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| /Documentation/devicetree/bindings/sound/ |
| D | st,sta350.txt | 7 - compatible: "st,sta350"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
22 - st,output-conf: number, Selects the output configuration:
23 0: 2-channel (full-bridge) power, 2-channel data-out
24 1: 2 (half-bridge). 1 (full-bridge) on-board power
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| D | cs35l33.txt | 5 - compatible : "cirrus,cs35l33"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : gpio used to reset the amplifier
17 - interrupts : IRQ line info CS35L33.
18 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
26 - cirrus,ramp-rate : On power up, it affects the time from when the power
27 up sequence begins to the time the audio reaches a full-scale output.
28 On power down, it affects the time from when the power-down sequence
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| D | st,sta32x.txt | 7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
26 - st,output-conf: number, Selects the output configuration:
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| /Documentation/arm/ |
| D | cluster-pm-race-avoidance.rst | 2 Cluster-wide Power-up/power-down race avoidance algorithm
16 ---------
20 power consumption and thermal dissipation.
29 cluster-level operations are only performed when it is truly safe to do
35 disabling those mechanisms may itself be a non-atomic operation (such as
38 power-down and power-up at the cluster level.
46 -----------
50 - DOWN
51 - COMING_UP
52 - UP
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| /Documentation/driver-api/ |
| D | dcdbas.rst | 10 management interrupts and host control actions (system power cycle or
11 power off after OS shutdown) on certain Dell systems.
29 buffer must reside in 32-bit address space, and the physical address of the
55 to perform a power cycle or power off of the system after the OS has finished
56 shutting down. On some Dell systems, this host control feature requires that
57 a driver perform a SMI after the OS has finished shutting down.
60 to schedule the driver to perform a power cycle or power off host control
61 action after the system has finished shutting down:
67 Dell OpenManage performs the following steps to execute a power cycle or
68 power off host control action using this driver:
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-max77620.txt | 1 Pincontrol driver for MAX77620 Power management IC from Maxim Semiconductor.
6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
11 --------------------------
14 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
15 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
16 <pinctrl-bindings.txt>.
19 sub-node have following properties:
22 ------------------
23 - pins: List of pins. Valid values of pins properties are:
27 -------------------
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| D | nvidia,tegra20-pinmux.txt | 4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, tristate, drive strength, etc.
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
34 Optional subnode-properties:
35 - nvidia,function: A string containing the name of the function to mux to the
38 - nvidia,pull: Integer, representing the pull-down/up to apply to the pin.
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| /Documentation/devicetree/bindings/mfd/ |
| D | max77620.txt | 1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
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| D | qcom-rpm.txt | 1 Qualcomm Resource Power Manager (RPM)
3 This driver is used to interface with the Resource Power Manager (RPM) found in
8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
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| D | max77693.txt | 1 Maxim MAX77693 multi-function device
4 - PMIC,
5 - CHARGER,
6 - LED,
7 - MUIC,
8 - HAPTIC
14 - compatible : Must be "maxim,max77693".
15 - reg : Specifies the i2c slave address of PMIC block.
16 - interrupts : This i2c device has an IRQ line connected to the main SoC.
19 - regulators : The regulators of max77693 have to be instantiated under subnode
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| D | twl4030-power.txt | 1 Texas Instruments TWL family (twl4030) reset and power management module
3 The power management module inside the TWL family provides several facilities
4 to control the power resources, including power scripts. For now, the
8 - compatible : must be one of the following
9 "ti,twl4030-power"
10 "ti,twl4030-power-reset"
11 "ti,twl4030-power-idle"
12 "ti,twl4030-power-idle-osc-off"
14 The use of ti,twl4030-power-reset is recommended at least on
17 When using ti,twl4030-power-idle, the TI recommended configuration
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| D | rohm,bd71837-pmic.txt | 1 * ROHM BD71837 and BD71847 Power Management Integrated Circuit bindings
3 BD71837MWV and BD71847MWV are programmable Power Management ICs for powering
4 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. They are
10 https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
12 https://www.rohm.com/datasheet/BD71847AMWV/bd71847amwv-e
15 - compatible : Should be "rohm,bd71837" for bd71837
17 - reg : I2C slave address.
18 - interrupt-parent : Phandle to the parent interrupt controller.
19 - interrupts : The interrupt line the device is connected to.
20 - clocks : The parent clock connected to PMIC. If this is missing
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| D | da9063.txt | 1 * Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)
3 DA9093 consists of a large and varied group of sub-devices (I2C Only):
6 ------ ------------ -----------
7 da9063-regulator : : LDOs & BUCKs
8 da9063-onkey : : On Key
9 da9063-rtc : : Real-Time Clock (DA9063 only)
10 da9063-watchdog : : Watchdog
16 - compatible : Should be "dlg,da9063" or "dlg,da9063l"
17 - reg : Specifies the I2C slave address (this defaults to 0x58 but it can be
19 - interrupts : IRQ line information.
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| /Documentation/devicetree/bindings/mmc/ |
| D | nvidia,tegra20-sdhci.txt | 7 by mmc.txt and the properties used by the sdhci-tegra driver.
10 - compatible : should be one of:
11 - "nvidia,tegra20-sdhci": for Tegra20
12 - "nvidia,tegra30-sdhci": for Tegra30
13 - "nvidia,tegra114-sdhci": for Tegra114
14 - "nvidia,tegra124-sdhci": for Tegra124 and Tegra132
15 - "nvidia,tegra210-sdhci": for Tegra210
16 - "nvidia,tegra186-sdhci": for Tegra186
17 - "nvidia,tegra194-sdhci": for Tegra194
18 - clocks : Must contain one entry, for the module clock.
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| D | mmc-pwrseq-sd8787.txt | 1 * Marvell SD8787 power sequence provider
4 - compatible: must be "mmc-pwrseq-sd8787".
5 - powerdown-gpios: contains a power down GPIO specifier with the
7 - reset-gpios: contains a reset GPIO specifier with the default
13 compatible = "mmc-pwrseq-sd8787";
14 powerdown-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
15 reset-gpios = <&twl_gpio 1 GPIO_ACTIVE_LOW>;
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| /Documentation/devicetree/bindings/power/reset/ |
| D | gemini-poweroff.txt | 1 * Device-Tree bindings for Cortina Systems Gemini Poweroff
4 deals with different ways to power the system down.
7 - compatible: should be "cortina,gemini-power-controller"
8 - reg: should contain the physical memory base and size
9 - interrupts: should contain the power management interrupt
13 power-controller@4b000000 {
14 compatible = "cortina,gemini-power-controller";
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| /Documentation/devicetree/bindings/phy/ |
| D | ti-phy.txt | 6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
21 "power", "pcie_pcs" and "control_sma" for control-phy-pcie
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-frequency-adf4371 | 3 Contact: linux-iio@vger.kernel.org
28 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
41 This attribute allows the user to power down the PLL and it's
43 Writing 1 causes the specified channel to power down.
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| /Documentation/sound/soc/ |
| D | overview.rst | 6 provide better ALSA support for embedded system-on-chip processors (e.g.
9 had some limitations:-
12 CPU. This is not ideal and leads to code duplication - for example,
18 machine specific code to re-route audio, enable amps, etc., after such an
21 * Drivers tended to power up the entire codec when playing (or
23 power on portable devices. There was also no support for saving
24 power via changing codec oversampling rates, bias currents, etc.
31 features :-
41 * Dynamic Audio Power Management (DAPM). DAPM automatically sets the codec to
42 its minimum power state at all times. This includes powering up/down
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| /Documentation/trace/ |
| D | coresight-cpu-debug.rst | 9 ------------
11 Coresight CPU debug module is defined in ARMv8-a architecture reference manual
13 debug module and it is mainly used for two modes: self-hosted debug and
16 explore debugging method which rely on self-hosted debug mode, this document
19 The debug module provides sample-based profiling extension, which can be used
21 every CPU has one dedicated debug module to be connected. Based on self-hosted
29 --------------
31 - During driver registration, it uses EDDEVID and EDDEVID1 - two device ID
32 registers to decide if sample-based profiling is implemented or not. On some
36 - At the time this documentation was written, the debug driver mainly relies on
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| /Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra186-pmc.txt | 1 NVIDIA Tegra Power Management Controller (PMC)
4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - reg: Must contain an (offset, length) pair of the register set for each
8 entry in reg-names.
9 - reg-names: Must include the following entries:
10 - "pmc"
11 - "wake"
12 - "aotag"
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| /Documentation/ABI/stable/ |
| D | sysfs-driver-mlxreg-io | 1 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_health
7 0 - health failed, 2 - health OK, 3 - ASIC in booting state.
11 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld1_version
12 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld2_version
21 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/fan_dir
27 forward direction - relevant bit is set 0;
28 reversed direction - relevant bit is set 1.
32 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_version
42 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_enable
52 What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/select_iio
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| /Documentation/input/devices/ |
| D | joystick-parport.rst | 3 .. _joystick-parport:
9 :Copyright: |copy| 1998-2000 Vojtech Pavlik <vojtech@ucw.cz>
10 :Copyright: |copy| 1998 Andree Borrmann <a.borrmann@tu-bs.de>
18 Any information in this file is provided as-is, without any guarantee that
36 Many console and 8-bit computer gamepads and joysticks are supported. The
40 ------------
57 The main problem with PC parallel ports is that they don't have +5V power
58 source on any of their pins. So, if you want a reliable source of power
59 for your pads, use either keyboard or joystick port, and make a pass-through
60 cable. You can also pull the power directly from the power supply (the red
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| /Documentation/devicetree/bindings/input/ |
| D | da9062-onkey.txt | 11 - compatible: should be one of the following valid compatible string lines:
12 "dlg,da9061-onkey", "dlg,da9062-onkey"
13 "dlg,da9062-onkey"
14 "dlg,da9063-onkey"
18 - dlg,disable-key-power : Disable power-down using a long key-press. If this
26 compatible = "dlg,da9063-onkey";
27 dlg,disable-key-power;
35 compatible = "dlg,da9062-onkey";
36 dlg,disable-key-power;
40 Example: DA9061 using a fall-back compatible for the DA9062 onkey driver
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