Searched full:r0 (Results 1 – 25 of 25) sorted by relevance
| /Documentation/virt/kvm/arm/ |
| D | hyp-abi.txt | 22 * r0/x0 = HVC_SET_VECTORS
30 * r0/x0 = HVC_RESET_VECTORS
36 * r0/x0 = HVC_SOFT_RESTART
46 Any other value of r0/x0 triggers a hypervisor-specific handling,
49 The return value of a stub hypercall is held by r0/x0, and is 0 on
51 clobber any of the caller-saved registers (x0-x18 on arm64, r0-r3 and
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| /Documentation/translations/zh_CN/arm/ |
| D | kernel_user_helpers.txt | 103 r0 = TLS 值
140 r0 = oldval
147 r0 = 成功代码 (零或非零)
148 C flag = 如果 r0 == 0 则置 1，如果 r0 != 0 则清零。
234 r0 = 指向 oldval
241 r0 = 成功代码 (零或非零)
242 C flag = 如果 r0 == 0 则置 1，如果 r0 != 0 则清零。
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| D | Booting | 155 r0 = 0，
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| /Documentation/arm/ |
| D | kernel_user_helpers.rst | 91 r0 = TLS value
127 r0 = oldval
134 r0 = success code (zero or non-zero)
135 C flag = set if r0 == 0, clear if r0 != 0
219 r0 = pointer to oldval
226 r0 = success code (zero or non-zero)
227 C flag = set if r0 == 0, clear if r0 != 0
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| D | booting.rst | 192 - r0 = 0,
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| /Documentation/sh/ |
| D | register-banks.txt | 8 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families
15 r0 ... r7 if SR.RB is set to the bank we are interested in, otherwise ldc/stc
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| /Documentation/powerpc/ |
| D | syscall64-abi.rst | 17 The system call number is specified in r0.
37 r0 Volatile (System call number.)
87 r0 is not used as an input. The vsyscall is selected by its address.
97 r0 Volatile
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| D | ultravisor.rst | 537 * If returning from an hypercall, register R0 contains the return
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| /Documentation/networking/ |
| D | filter.txt | 627 * R0 - return value from in-kernel function, and exit value for eBPF program
639 R0 - R5 are scratch registers and eBPF program needs spill/fill them if
683 After an in-kernel function call, R1 - R5 are reset to unreadable and R0 has
725 R0 - rax
748 bpf_mov R7, R0 /* save foo() return value */
755 bpf_add R0, R7
793 registers and place their return value into '%rax' which is R0 in eBPF.
795 interpreter. R0-R5 are scratch registers, so eBPF program needs to preserve
802 bpf_mov R0, R1
941 value into register R0 before doing a BPF_EXIT. Class 6 in eBPF is used as
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| /Documentation/devicetree/bindings/arm/ |
| D | cci.txt | 93 "arm,cci-400-pmu,r0"
97 "arm,cci-500-pmu,r0"
98 "arm,cci-550-pmu,r0"
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| D | juno,scpi.txt | 22 For Juno R0 and Juno R1 refer to [1] for the
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| D | arm-boards | 180 iteration, Juno r0, is a vehicle for evaluating big.LITTLE on AArch64,
192 compatible = "arm,juno"; /* For Juno r0 board */
208 model = "ARM Juno development board (r0)";
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| D | psci.yaml | 25 r0 => 32-bit Function ID / return value
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| /Documentation/ |
| D | atomic_t.txt | 243 r0 = READ_ONCE(*x);
256 (r0=1 /\ r1=0)
268 r0 = *x (1)
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| D | memory-barriers.txt | 1432 r0 = smp_load_acquire(&x);
1462 r0 == 1 && r1 == 1 && r2 == 1
1474 r0 == 0 && r1 == 1 && r2 == 1 && r3 == 0 && r4 == 0
1478 r0 == 0 && r1 == 1 && r2 == 1 && r3 == 0 && r4 == 0 && r5 == 1
1495 r0 == 0 && r1 == 0 && r2 == 0 && r5 == 0
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| /Documentation/devicetree/bindings/arm/firmware/ |
| D | sdei.txt | 15 r0 => 32-bit Function ID / return value
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| /Documentation/hwmon/ |
| D | ds1621.rst | 138 support, which is achieved via the R0 and R1 config register bits, where:
140 R0..R1
144 R0 R1
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| /Documentation/devicetree/bindings/display/ |
| D | arm,pl11x.txt | 51 as R0 (first bit of the red component), second value
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mt65xx.txt | 65 Some special pins have extra pull up strength, there are R0 and R1 pull-up
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| D | pinctrl-mt8183.txt | 49 Some special pins have extra pull up strength, there are R0 and R1 pull-up
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| /Documentation/virt/kvm/ |
| D | ppc-pv.txt | 39 r0 - volatile
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| /Documentation/bpf/ |
| D | bpf_design_QA.rst | 41 A: NO. BPF allows only register R0 to be used as return value.
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| /Documentation/translations/ko_KR/ |
| D | memory-barriers.txt | 1425 r0 = smp_load_acquire(&x);
1454 r0 == 1 && r1 == 1 && r2 == 1
1465 r0 == 0 && r1 == 1 && r2 == 1 && r3 == 0 && r4 == 0
1469 r0 == 0 && r1 == 1 && r2 == 1 && r3 == 0 && r4 == 0 && r5 == 1
1485 r0 == 0 && r1 == 0 && r2 == 0 && r5 == 0
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| /Documentation/trace/ |
| D | coresight.rst | 354 …Instruction 0 0x8026B574 E59F0010 false LDR r0,[pc,#16] ; [0x8026B58C…
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| /Documentation/devicetree/ |
| D | booting-without-of.txt | 168 r0 : 0
179 r0 : 0
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