Searched full:r1 (Results 1 – 25 of 53) sorted by relevance
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| /Documentation/devicetree/bindings/pci/ |
| D | arm,juno-r1-pcie.txt | 1 * ARM Juno R1 PCIe interface
8 - compatible: "arm,juno-r1-pcie"
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| /Documentation/devicetree/bindings/regulator/ |
| D | ltc3676.txt | 18 values R1 and R2 of the feedback voltage divider in ohms.
22 0.4125 * (1 + R1/R2) V and 0.8 * (1 + R1/R2) V.
25 0.725 * (1 + R1/R2) V. The ldo3 regulator is fixed to 1.8 V. The ldo1 standby
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| D | ltc3589.txt | 18 values R1 and R2 of the feedback voltage divider in ohms.
22 0.3625 * (1 + R1/R2) V and 0.75 * (1 + R1/R2) V. Regulators bb-out and ldo1
23 have a fixed 0.8 V reference and thus output 0.8 * (1 + R1/R2) V. The ldo3
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| /Documentation/networking/ |
| D | filter.txt | 628 * R1 - R5 - arguments from eBPF program to in-kernel function
674 place function arguments into R1 to R5 registers to satisfy calling
676 to in-kernel function. If R1 - R5 registers are mapped to CPU registers
683 After an in-kernel function call, R1 - R5 are reset to unreadable and R0 has
707 bpf_mov R2, R1
708 bpf_add R1, 1
717 already placed into R1 (e.g. on __bpf_prog_run() startup) and the programs
726 R1 - rdi
742 bpf_mov R6, R1 /* save ctx */
749 bpf_mov R1, R6 /* restore ctx for next call */
[all …]
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| /Documentation/arm/samsung/ |
| D | bootloader-interface.rst | 47 0x20 exynos_cpu_resume (Exynos4210 r1.0) AFTR
48 0x24 0xfcba0d10 (Magic cookie, Exynos4210 r1.0) AFTR
60 0x0814 exynos4_secondary_startup (Exynos4210 r1.1) Secondary CPU boot
61 0x0818 0xfcba0d10 (Magic cookie, Exynos4210 r1.1) AFTR
62 0x081C exynos_cpu_resume (Exynos4210 r1.1) AFTR
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| /Documentation/virt/kvm/arm/ |
| D | hyp-abi.txt | 23 r1/x1 = vectors
37 r1/x1 = restart address
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| /Documentation/hwmon/ |
| D | ltc4260.rst | 45 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
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| D | ltc4261.rst | 45 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
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| D | ltc2945.rst | 45 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
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| D | ds1621.rst | 138 support, which is achieved via the R0 and R1 config register bits, where:
140 R0..R1
144 R0 R1
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| /Documentation/RCU/ |
| D | rcu_dereference.txt | 76 r1 = *q; /* BUGGY!!! */
225 int r1, r2;
230 r1 = p->b; /* Guaranteed to get 143. */
236 do_something_with(r1, r2);
239 You might be surprised that the outcome (r1 == 143 && r2 == 44) is possible,
241 a second time between the time reader() loaded into "r1" and the time
282 int r1, r2;
288 r1 = p->b; /* Guaranteed to get 143. */
295 do_something_with(r1, r2);
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| /Documentation/scsi/ |
| D | NinjaSCSI.txt | 20 card, and write ["WBT", "NinjaSCSI-3", "R1.0"] or some other string to
28 Jan 2 03:45:06 lindberg cardmgr[78]: product info: "WBT", "NinjaSCSI-3", "R1.0"
71 version "WBT", "NinjaSCSI-3", "R1.0"
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| /Documentation/devicetree/bindings/arm/ |
| D | arm-boards | 181 with the second iteration, Juno r1, mainly aimed at development of PCIe
182 based systems. Juno r1 also has support for AXI masters placed on the TLX
193 compatible = "arm,juno-r1"; /* For Juno r1 board */
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| D | juno,scpi.txt | 22 For Juno R0 and Juno R1 refer to [1] for the
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| /Documentation/leds/ |
| D | leds-lp5523.rst | 22 - /sys/class/leds/R1 (name: 'R1')
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| /Documentation/devicetree/bindings/sound/ |
| D | rt5660.txt | 32 * DMIC R1
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| D | rt5682.txt | 33 * DMIC R1
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| D | rt5668.txt | 33 * DMIC R1
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| D | rt5651.txt | 44 * DMIC R1
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| D | rt5665.txt | 40 * DMIC R1
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| D | rt5659.txt | 47 * DMIC R1
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| /Documentation/ |
| D | atomic_t.txt | 245 r1 = atomic_read(y);
256 (r0=1 /\ r1=0)
270 r1 = *y (0)
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | nuvoton,npcm7xx-pinctrl.txt | 150 iox2, ioxh, gspi, mmc, mmcwp, mmccd, mmcrst, mmc8, r1, r1err, r1md,
165 r1_pins: r1-pins {
166 groups = "r1";
167 function = "r1";
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| /Documentation/devicetree/bindings/arm/firmware/ |
| D | sdei.txt | 16 {r1 - r3} => Parameters
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| /Documentation/translations/zh_CN/arm/ |
| D | kernel_user_helpers.txt | 141 r1 = newval
235 r1 = 指向 newval
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