Home
last modified time | relevance | path

Searched +full:range +full:- +full:gpios (Results 1 – 25 of 65) sorted by relevance

123

/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Beniamin Bia <beniamin.bia@analog.com>
11 - Stefan Popa <stefan.popa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-8
[all …]
/Documentation/devicetree/bindings/input/touchscreen/
Dedt-ft5x06.txt1 FocalTech EDT-FT5x06 Polytouch driver
19 - compatible: "edt,edt-ft5206"
20 or: "edt,edt-ft5306"
21 or: "edt,edt-ft5406"
22 or: "edt,edt-ft5506"
23 or: "evervision,ev-ft5726"
26 - reg: I2C slave address of the chip (0x38)
27 - interrupts: interrupt specification for the touchdetect
31 - reset-gpios: GPIO specification for the RESET input
32 - wake-gpios: GPIO specification for the WAKE input
[all …]
/Documentation/devicetree/bindings/iio/dac/
Dad5758.txt4 - compatible: Must be "adi,ad5758"
5 - reg: SPI chip select number for the device
6 - spi-max-frequency: Max SPI frequency to use (< 50000000)
7 - spi-cpha: is the only mode that is supported
11 - adi,dc-dc-mode: Mode of operation of the dc-to-dc converter
19 In this mode, the VDPC+ voltage is user-programmable to
36 - adi,range-microvolt: Voltage output range
38 * <0 5000000>: 0 V to 5 V voltage range
39 * <0 10000000>: 0 V to 10 V voltage range
40 * <(-5000000) 5000000>: ±5 V voltage range
[all …]
Dti,dac7612.txt1 * Texas Instruments Dual, 12-Bit Serial Input Digital-to-Analog Converter
3 The DAC7612 is a dual, 12-bit digital-to-analog converter (DAC) with guaranteed
4 12-bit monotonicity performance over the industrial temperature range.
12 - compatible: Should be one of:
16 - reg: Definition as per Documentation/devicetree/bindings/spi/spi-bus.txt
19 - ti,loaddacs-gpios: GPIO descriptor for the LOADDACS pin.
20 - spi-*: Definition as per Documentation/devicetree/bindings/spi/spi-bus.txt
27 ti,loaddacs-gpios = <&msmgpio 25 GPIO_ACTIVE_LOW>;
/Documentation/devicetree/bindings/sound/
Daxentia,tse850-pcm5142.txt1 Devicetree bindings for the Axentia TSE-850 audio complex
4 - compatible: "axentia,tse850-pcm5142"
5 - axentia,cpu-dai: The phandle of the cpu dai.
6 - axentia,audio-codec: The phandle of the PCM5142 codec.
7 - axentia,add-gpios: gpio specifier that controls the mixer.
8 - axentia,loop1-gpios: gpio specifier that controls loop relays on channel 1.
9 - axentia,loop2-gpios: gpio specifier that controls loop relays on channel 2.
10 - axentia,ana-supply: Regulator that supplies the output amplifier. Must
11 support voltages in the 2V - 20V range, in 1V steps.
13 The schematics explaining the gpios are as follows:
[all …]
Dcs35l34.txt5 - compatible : "cirrus,cs35l34"
7 - reg : the I2C address of the device for I2C.
9 - VA-supply, VP-supply : power supplies for the device,
13 - cirrus,boost-vtge-millivolt : Boost Voltage Value. Configures the boost
14 converter's output voltage in mV. The range is from VP to 8V with
17 - cirrus,boost-nanohenry: Inductor value for boost converter. The value is
22 - reset-gpios: GPIO used to reset the amplifier.
24 - interrupts : IRQ line info CS35L34.
25 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
28 - cirrus,boost-peak-milliamp : Boost converter peak current limit in mA. The
[all …]
/Documentation/devicetree/bindings/misc/
Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
/Documentation/devicetree/bindings/gpio/
Dgpio.txt4 1) gpios property
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
9 for compatibility reasons (resolving to the "gpios" property), it is not allowed
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
15 cases should they contain more than one. If your device uses several GPIOs with
17 meaningful name. The only case where an array of GPIOs is accepted is when
18 several GPIOs serve the same function (e.g. a parallel data line).
20 The exact purpose of each gpios property must be documented in the device tree
[all …]
Dgpio-atlas7.txt4 - compatible : "sirf,atlas7-gpio"
5 - reg : Address range of the pinctrl registers
6 - interrupts : Interrupts used by every GPIO group
7 - gpio-banks : How many gpio banks on this controller
8 - gpio-controller : Indicates this device is a GPIO controller
9 - interrupt-controller : Marks the device node as an interrupt controller
13 interrupt-controller/interrupts.txt.
18 compatible = "sirf,atlas7-gpio";
22 #gpio-cells = <2>;
23 #interrupt-cells = <2>;
[all …]
Dmediatek,mt7621-gpio.txt3 The IP core used inside these SoCs has 3 banks of 32 GPIOs each.
4 The registers of all the banks are interwoven inside one single IO range.
6 interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU
10 - #gpio-cells : Should be two. The first cell is the GPIO pin number and the
11 second cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
13 - #interrupt-cells : Specifies the number of cells needed to encode an
16 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
17 - compatible:
18 - "mediatek,mt7621-gpio" for Mediatek controllers
19 - reg : Physical base address and length of the controller's registers
[all …]
Dspear_spics.txt10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
18 * reg: mentioning address range of spics controller
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
[all …]
/Documentation/devicetree/bindings/leds/backlight/
Dpwm-backlight.txt1 pwm-backlight bindings
4 - compatible: "pwm-backlight"
5 - pwms: OF device-tree PWM specification (see PWM binding[0])
6 - power-supply: regulator for supply voltage
9 - pwm-names: a list of names for the PWM devices specified in the
11 - enable-gpios: contains a single GPIO specifier for the GPIO which enables
13 - post-pwm-on-delay-ms: Delay in ms between setting an initial (non-zero) PWM
15 - pwm-off-delay-ms: Delay in ms between disabling the backlight using GPIO
17 - brightness-levels: Array of distinct brightness levels. Typically these
18 are in the range from 0 to 255, but any range starting at
[all …]
/Documentation/devicetree/bindings/iio/proximity/
Ddevantech-srf04.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/proximity/devantech-srf04.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Devantech SRF04 and Maxbotix mb1000 ultrasonic range finder
10 - Andreas Klinger <ak@it-klinger.de>
13 Bit-banging driver using two GPIOs:
14 - trigger-gpio is raised by the driver to start sending out an ultrasonic
16 - echo-gpio is held high by the sensor after sending ultrasonic burst
20 http://www.robot-electronics.co.uk/htm/srf04tech.htm
[all …]
/Documentation/ABI/obsolete/
Dsysfs-gpio8 userspace. GPIOs are only made available to userspace by an explicit
13 GPIOs are identified as they are inside the kernel, using integers in
14 the range 0..INT_MAX. See Documentation/admin-guide/gpio for more information.
20 /<LINE-NAME> ... for a properly named GPIO line
21 /value ... always readable, writes fail for input GPIOs
27 /ngpio ... (r/o) number of GPIOs; numbered N to N + (ngpio - 1)
/Documentation/devicetree/bindings/regulator/
Dmax8952.txt4 - compatible: must be equal to "maxim,max8952"
5 - reg: I2C slave address, usually 0x60
6 - max8952,dvs-mode-microvolt: array of 4 integer values defining DVS voltages
7 in microvolts. All values must be from range <770000, 1400000>
8 - any required generic properties defined in regulator.txt
11 - max8952,vid-gpios: array of two GPIO pins used for DVS voltage selection
12 - max8952,en-gpio: GPIO used to control enable status of regulator
13 - max8952,default-mode: index of default DVS voltage, from <0, 3> range
14 - max8952,sync-freq: sync frequency, must be one of following values:
15 - 0: 26 MHz
[all …]
Dpwm-regulator.txt7 predefined voltage <=> duty-cycle values must be
10 Intermediary duty-cycle values which would normally
13 the user if the assumptions made in continuous-voltage
18 regulator-{min,max}-microvolt properties to calculate
19 appropriate duty-cycle values. This allows for a much
21 voltage-table mode above. This solution does make an
22 assumption that a %50 duty-cycle value will cause the
27 --------------------
28 - compatible: Should be "pwm-regulator"
30 - pwms: PWM specification (See: ../pwm/pwm.txt)
[all …]
Dmax77686.txt3 This is a part of the device tree bindings of MAX77686 multi-function device.
6 The MAX77686 PMIC has 9 high-efficiency Buck and 26 Low-DropOut (LDO)
12 - voltage-regulators : The regulators of max77686 have to be instantiated
13 under subnode named "voltage-regulators" using the following format.
16 regulator-compatible = LDOn/BUCKn
24 -LDOn : for LDOs, where n can lie in range 1 to 26.
26 -BUCKn : for BUCKs, where n can lie in range 1 to 9.
30 -LDOn : 2, 6-8, 10-12, 14-16,
31 -BUCKn : 1-4.
32 Use standard regulator bindings for it ('regulator-off-in-suspend').
[all …]
/Documentation/devicetree/bindings/mfd/
Dmax8998.txt1 * Maxim MAX8998, National/TI LP3974 multi-function device
3 The Maxim MAX8998 is a multi-function device which includes voltage/current
5 other sub-blocks. It is interfaced using an I2C interface. Each sub-block
8 PMIC sub-block
9 --------------
11 The PMIC sub-block contains a number of voltage and current regulators,
17 - compatible: Should be one of the following:
18 - "maxim,max8998" for Maxim MAX8998
19 - "national,lp3974" or "ti,lp3974" for National/TI LP3974.
20 - reg: Specifies the i2c slave address of the pmic block. It should be 0x66.
[all …]
Dti-lmu.txt6 ------ ---------------------------------
14 - compatible: Should be one of:
20 - reg: I2C slave address.
28 - enable-gpios: A GPIO specifier for hardware enable pin.
29 - ramp-up-us: Current ramping from one brightness level to
31 Range from 2048 us - 117.44 s
32 - ramp-down-us: Current ramping from one brightness level to
34 Range from 2048 us - 117.44 s
35 - ti,brightness-resolution - This determines whether to use 8 bit brightness
47 - backlight: All LMU devices have backlight child nodes.
[all …]
/Documentation/devicetree/bindings/leds/
Dleds-lm3532.txt1 * Texas Instruments - lm3532 White LED driver with ambient light sensing
4 The LM3532 provides the 3 high-voltage, low-side current sinks. The device is
5 programmable over an I2C-compatible interface and has independent
11 each with 32 internal voltage setting resistors, 8-bit logarithmic and linear
16 - compatible : "ti,lm3532"
17 - reg : I2C slave address
18 - #address-cells : 1
19 - #size-cells : 0
22 - enable-gpios : gpio pin to enable (active high)/disable the device.
23 - ramp-up-us - The Run time ramp rates/step are from one current
[all …]
/Documentation/devicetree/bindings/usb/
Dusb251xb.txt1 Microchip USB 2.0 Hi-Speed Hub Controller
4 Hi-Speed Controller.
7 - compatible : Should be "microchip,usb251xb" or one of the specific types:
11 - reg : I2C address on the selected bus (default is <0x2C>)
14 - reset-gpios : Should specify the gpio for hub reset
15 - skip-config : Skip Hub configuration, but only send the USB-Attach command
16 - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)
17 - product-id : Set USB Product ID of the hub (16 bit, default depends on type)
18 - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)
19 - language-id : Set USB Language ID (16 bit, default is 0x0000)
[all …]
/Documentation/devicetree/bindings/net/
Dfsl-fec.txt4 - compatible : Should be "fsl,<soc>-fec"
5 - reg : Address and length of the register set for the device
6 - interrupts : Should contain fec interrupt
7 - phy-mode : See ethernet.txt file in the same directory
10 - phy-supply : regulator that powers the Ethernet PHY.
11 - phy-handle : phandle to the PHY device connected to this device.
12 - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
13 Use instead of phy-handle.
14 - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
17 - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
[all …]
/Documentation/devicetree/bindings/display/
Dssd1307fb.txt4 - compatible: Should be "solomon,<chip>fb-<bus>". The only supported bus for
7 - reg: Should contain address of the controller on the I2C bus. Most likely
9 - pwm: Should contain the pwm to use according to the OF device tree PWM
11 - solomon,height: Height in pixel of the screen driven by the controller
12 - solomon,width: Width in pixel of the screen driven by the controller
13 - solomon,page-offset: Offset of pages (band of 8 pixels) that the screen is
17 - reset-gpios: The GPIO used to reset the OLED display, if available. See
19 - vbat-supply: The supply for VBAT
20 - solomon,segment-no-remap: Display needs normal (non-inverted) data column
22 - solomon,com-seq: Display uses sequential COM pin configuration
[all …]
/Documentation/devicetree/bindings/pci/
Dkirin-pcie.txt6 Documentation/devicetree/bindings/pci/designware-pcie.txt.
11 - compatible:
12 "hisilicon,kirin960-pcie" for PCIe of Kirin960 SoC
13 - reg: Should contain rc_dbi, apb, phy, config registers location and length.
14 - reg-names: Must include the following entries:
19 - reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal.
26 compatible = "hisilicon,kirin-pcie";
29 reg-names = "dbi","apb","phy", "config";
30 bus-range = <0x0 0x1>;
31 #address-cells = <3>;
[all …]
/Documentation/driver-api/gpio/
Dlegacy.rst13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
18 which GPIOs. Drivers can be written generically, so that board setup code
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
24 provide GPIOs; multifunction chips like power managers, and audio codecs
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
30 The exact capabilities of GPIOs vary between systems. Common options:
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
[all …]

123