Searched full:ranges (Results 1 – 25 of 428) sorted by relevance
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-uniphier.txt | 18 - gpio-ranges: Mapping to pin controller pins (as described in gpio.txt)
19 - socionext,interrupt-ranges: Specifies an interrupt number mapping between
24 - gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt)
35 gpio-ranges = <&pinctrl 0 0 0>;
36 gpio-ranges-group-names = "gpio_range";
38 socionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>;
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| D | gpio.txt | 152 the gpio-reserved-ranges binding. This property indicates the start and size
178 gpio-reserved-ranges = <0 4>, <12 2>;
239 2.2) Ordinary (numerical) GPIO ranges
243 controllers. The gpio-ranges property described below represents this with
244 a discrete set of ranges mapping pins from the pin controller local number space
257 ranges with just one pin-to-GPIO line mapping if the ranges are concocted, but
258 in practice these ranges are often lumped in discrete sets.
262 gpio-ranges = <&foo 0 20 10>, <&bar 10 50 20>;
276 gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
284 2.3) GPIO ranges from named pin groups
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| D | abilis,tb10x-gpio.txt | 18 GPIO ranges are specified as described in
33 gpio-ranges = <&iomux 0 0 0>;
34 gpio-ranges-group-names = "gpioa_pins";
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | raideng.txt | 16 - ranges: standard ranges property specifying the translation
26 ranges = <0 0x320000 0x10000>;
36 - ranges: standard ranges property specifying the translation
44 ranges = <0x0 0x1000 0x1000>;
72 ranges = <0x0 0x1000 0x1000>;
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| D | mpic-timer.txt | 10 - fsl,available-ranges: use <start count> style section to define which
15 with timer zero. If timer-available-ranges is present, only the
25 fsl,available-ranges = <2 2>;
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| /Documentation/devicetree/bindings/pci/ |
| D | xgene-pci.txt | 14 - ranges: ranges for the outbound memory, I/O regions.
15 - dma-ranges: ranges for the inbound memory regions.
38 ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000 /* io */
40 dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
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| D | rcar-pci.txt | 30 - ranges: ranges for the PCI memory and I/O regions.
31 - dma-ranges: ranges for the inbound memory regions.
57 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
61 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000
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| D | mvebu-pci.txt | 15 - ranges: ranges describing the MMIO registers to control the PCIe
16 interfaces, and ranges describing the MBus windows needed to access
21 The ranges describing the MMIO registers have the following layout:
37 The ranges describing the MBus windows have the following layout:
53 hardware, and only determined in runtime, those ranges cover the full first
71 - ranges, translating the MBus windows ranges of the parent node into
96 ranges =
138 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
158 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
174 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
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| D | mediatek-pcie.txt | 38 - ranges: Ranges for the PCI memory and I/O regions.
67 - ranges: Sub-ranges distributed from the PCIe controller node. An empty
110 ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000 /* I/O space */
120 ranges;
130 ranges;
140 ranges;
164 ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
171 ranges;
189 ranges;
235 ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x10000000>;
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| D | v3-v360epc-pci.txt | 15 - ranges: this follows the standard PCI bindings in the IEEE Std
21 - dma-ranges: three ranges for the inbound memory region. The ranges must
24 as pre-fetchable. Two ranges are supported by the hardware.
43 ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */
49 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
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| D | faraday,ftpci100.txt | 25 - ranges: see pci.txt
28 - dma-ranges: three ranges for the inbound memory region. The ranges must
51 "dual" variant has 64MiB. Take this into account when describing the ranges.
97 ranges = /* 1MiB I/O space 0x50000000-0x500fffff */
102 /* DMA ranges */
103 dma-ranges =
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| /Documentation/devicetree/bindings/bus/ |
| D | mvebu-mbus.txt | 24 - ranges: Must be set up to provide a proper translation for each child.
104 Following the above encoding, for each ranges entry for a MBus valid window
115 ranges = <0xf0010000 0 0 0xd0000000 0x100000
128 ranges = <0 0xf0010000 0 0x100000>;
139 In the shown example, the translation entry in the 'ranges' property is what
157 ranges = < MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
172 ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
198 The mbus-node ranges property defines a set of mbus windows that are expected
200 with one another or with the system memory ranges.
207 with the ones listed in the ranges, e.g. for mapping PCIe devices.
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| /Documentation/devicetree/bindings/mips/cavium/ |
| D | sata-uctl.txt | 23 - #address-cells, #size-cells, ranges and dma-ranges must be present and hold
31 ranges; /* Direct mapping */
32 dma-ranges;
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | marvell,gicp.txt | 15 - marvell,spi-ranges: tuples of GIC SPI interrupts ranges available
25 marvell,spi-ranges = <64 64>, <288 64>;
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| D | arm,gic-v3.yaml | 37 ranges: true
110 being exposed by the HW, and the mbi-ranges property present.
112 mbi-ranges:
116 ranges can be provided.
152 mbi-ranges: [ msi-controller ]
153 msi-controller: [ mbi-ranges ]
213 ranges;
223 mbi-ranges = <256 128>;
238 ranges;
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-stmfx.txt | 15 - gpio-ranges: specifies the mapping between gpio controller and pin
16 controller pins. Check "Concerning gpio-ranges property" below.
37 Concerning gpio-ranges property:
39 should use gpio-ranges = <&stmfx_pinctrl 0 0 24>;
41 should use gpio-ranges = <&stmfx_pinctrl 0 0 16>, <&stmfx_pinctrl 20 20 4>;
43 should use gpio-ranges = <&stmfx_pinctrl 0 0 20>;
57 gpio-ranges = <&stmfx_pinctrl 0 0 24>;
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| D | st,stm32-pinctrl.yaml | 35 ranges: true
72 gpio-ranges:
195 - ranges
207 ranges = <0 0x40020000 0x3000>;
220 //Example 2 (using gpio-ranges)
225 ranges = <0 0x50020000 0x3000>;
235 gpio-ranges = <&pinctrl 0 0 16>;
246 gpio-ranges = <&pinctrl 0 16 3>,
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ti-aemif.txt | 32 - ranges: Contains memory regions. There are two types of
33 ranges/partitions:
50 - clock-ranges: Empty property indicating that child nodes can inherit
66 - ranges: Empty property indicating that child nodes can inherit
69 - clock-ranges: Empty property indicating that child nodes can inherit
147 clock-ranges;
149 ranges = <0 0 0x70000000 0x10000000
160 clock-ranges;
161 ranges;
189 clock-ranges;
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| D | arm,pl172.txt | 17 - ranges: Must contain one or more chip select memory regions.
23 - clock-ranges: Empty property indicating that child nodes can inherit
37 - ranges: Empty property indicating that child nodes can inherit
40 - clock-ranges: Empty property indicating that child nodes can inherit
97 ranges = <0 0 0x1c000000 0x1000000
105 ranges;
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| /Documentation/devicetree/bindings/mmc/ |
| D | mmc-spi-slot.txt | 8 - voltage-ranges : two cells are required, first cell specifies minimum
10 Several ranges could be specified.
25 voltage-ranges = <3300 3300>;
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-pxa-pci-ce4100.txt | 10 Grant Likely recommended to use the ranges property to map the PCI-Bar
15 ranges describes how the parent pci address space
25 ranges allows the address mapping to be described
45 * requires also a valid translation in parents ranges
48 ranges = <0 0 0x02000000 0 0xdffe0500 0x100
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-tipwmss.txt | 14 - ranges: describes the address mapping of a memory-mapped bus. Should set to
29 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
42 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
55 ranges;
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| /Documentation/devicetree/bindings/c6x/ |
| D | soc.txt | 9 - ranges
25 ranges;
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| /Documentation/devicetree/bindings/mfd/ |
| D | mfd.txt | 28 - ranges: Describes the address mapping relationship to the parent. Should set
33 addresses. Must be present if ranges is used.
36 address. Must be present if ranges is used.
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| /Documentation/devicetree/bindings/net/ |
| D | marvell,prestera.txt | 21 ranges = <0 MBUS_ID(0x03, 0x00) 0 0x100000>;
36 - ranges: describes the address mapping of a memory-mapped bus.
45 ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
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