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/Documentation/admin-guide/cgroup-v1/
Drdma.rst33 Therefore RDMA controller is needed through which resource consumption
41 resource accounting per cgroup, per device using resource pool structure.
42 Each such resource pool is limited up to 64 resources in given resource pool
45 This resource pool object is linked to the cgroup css. Typically there
46 are 0 to 4 resource pool instances per cgroup, per device in most use cases.
54 to other cgroup without major complexity of transferring resource ownership;
60 Whenever RDMA resource charging occurs, owner rdma cgroup is returned to
61 the caller. Same rdma cgroup should be passed while uncharging the resource.
62 This also allows process migrated with active RDMA resource to charge
63 to new owner cgroup for new resource. It also allows to uncharge resource of
[all …]
Dpids.rst12 place, PIDs are a fundamental resource. As such, PID exhaustion must be
13 preventable in the scope of a cgroup hierarchy by allowing resource limiting of
64 sh: fork: Resource temporary unavailable
79 sh: fork: Resource temporary unavailable
88 sh: fork: Resource temporary unavailable
91 sh: fork: Resource temporary unavailable
/Documentation/devicetree/bindings/edac/
Dapm-xgene-edac.txt15 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
16 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
17 - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource.
18 - regmap-efuse : Regmap of the PMD efuse resource.
19 - regmap-rb : Regmap of the register bus resource. This property
23 - reg : First resource shall be the CPU bus (PCP) resource.
29 - reg : First resource shall be the memory controller unit
30 (MCU) resource.
36 - reg : First resource shall be the PMD resource.
42 - reg : First resource shall be the L3 EDAC resource.
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/Documentation/devicetree/bindings/perf/
Dapm-xgene-pmu.txt16 - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
17 - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
18 - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource.
19 - reg : First resource shall be the CPU bus PMU resource.
24 - reg : First resource shall be the L3C PMU resource.
28 - reg : First resource shall be the IOB PMU resource.
32 - reg : First resource shall be the MCB PMU resource.
37 - reg : First resource shall be the MC PMU resource.
/Documentation/devicetree/bindings/ata/
Dapm-xgene.txt9 - reg : First memory resource shall be the AHCI memory
10 resource.
11 Second memory resource shall be the host controller
12 core memory resource.
13 Third memory resource shall be the host controller
14 diagnostic memory resource.
15 4th memory resource shall be the host controller
16 AXI memory resource.
17 5th optional memory resource shall be the host
18 controller MUX memory resource if required.
/Documentation/
Dremoteproc.txt246 also include a special section which we call "the resource table".
248 The resource table contains system resources that the remote processor
251 Remotecore will only power up the device after all the resource table's
254 In addition to system resources, the resource table may also contain
255 resource entries that publish the existence of supported features
259 The resource table begins with this header::
262 * struct resource_table - firmware resource table header
264 * @num: number of resource entries
266 * @offset: array of offsets pointing at the various resource entries
268 * The header of the resource table, as expressed by this structure,
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/Documentation/devicetree/bindings/reserved-memory/
Dqcom,cmd-db.txt4 Command DB is a database that provides a mapping between resource key and the
5 resource address for a system resource managed by a remote processor. The data
10 resource properties may change. These properties are dynamically probed by the
/Documentation/x86/
Dresctrl_ui.rst5 User Interface for Resource Control feature
14 Intel refers to this feature as Intel Resource Director Technology(Intel(R) RDT).
21 RDT (Resource Director Technology) Allocation "rdt_a"
55 and allocation, see the "Resource alloc and monitor groups" section.
61 resources. Each resource has its own subdirectory. The subdirectory
62 names reflect the resource names.
67 Cache resource(L3/L2) subdirectory contains the following files
72 resource. The kernel uses the smallest number of
75 The bitmask which is valid for this resource.
82 Bitmask of shareable resource with other executing
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/Documentation/driver-api/
Dmen-chameleon-bus.rst14 3 Resource handling
40 that only use a single memory resource and share the PCI legacy IRQ. Not
43 - Multi-resource MCB devices like the VME Controller or M-Module carrier.
89 are allocated and their resources are assigned according to the resource
90 assignment in the Chameleon table. After resource assignment is finished, the
94 Resource handling
97 The current implementation assigns exactly one memory and one IRQ resource
103 Each MCB device has exactly one memory resource, which can be requested from
104 the MCB bus. This memory resource is the physical address of the MCB device
111 Each MCB device has exactly one IRQ resource, which can be requested from the
Dsm501.rst19 include locking for common registers, clock control and resource
42 maximum possible resource allocation can be made to the video subsystem
43 as this is by-far the most resource-sensitive of the on-chip functions.
/Documentation/devicetree/bindings/soc/qcom/
Drpmh-rsc.txt4 Resource Power Manager Hardened (RPMH) is the mechanism for communicating with
5 the hardened resource accelerators on Qualcomm SoCs. Requests to the resources
10 The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity
11 (Resource State Coordinator a.k.a RSC) that can handle multiple sleep and
12 active/wake resource requests. Multiple such DRVs can exist in a SoC and can
27 Requests can be made for the state of a resource, when the subsystem is active
28 or idle. When all subsystems like Modem, GPU, CPU are idle, the resource state
/Documentation/PCI/
Dacpi-info.rst24 ACPI resource description is done via _CRS objects of devices in the ACPI
26 _CRS and figure out what resource is being consumed even if it doesn't have
120 information about current and possible resource requirements, the
124 When OSPM enumerates a device, it calls _PRS to determine the resource
126 resource settings for the device. Using this information, the Plug and
133 taken from the nearest matching resource above the device in the device
143 * 1 – This device consumes this resource
144 * 0 – This device produces and consumes this resource
156 4.1.3) must be reserved by declaring a motherboard resource. For most
157 systems, the motherboard resource would appear at the root of the ACPI
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/Documentation/devicetree/bindings/powerpc/fsl/
Dpmc.txt22 - reg: For devices compatible with "fsl,mpc8349-pmc", the first resource
23 is the PMC block, and the second resource is the Clock Configuration
26 For devices compatible with "fsl,mpc8548-pmc", the first resource
30 resource is the PMC block interrupt.
/Documentation/filesystems/
Dsysfs-pci.txt16 | |-- resource
42 resource PCI resource host addresses (ascii, ro)
43 resource0..N PCI resource N, if present (binary, mmap, rw[1])
44 resource0_wc..N_wc PCI WC map resource N, if prefetchable (binary, mmap)
46 rom PCI ROM resource, if present (binary, ro)
115 In order to support PCI resource mapping as described above, Linux platform
Ddlmfs.txt77 Lock value blocks can be read and written to a resource via read(2)
96 open(2) with O_CREAT to ensure the resource inode is created - dlmfs does
111 could not lock the resource then open(2) will return ETXTBUSY.
119 The resource LVB may be read from the fd in either Shared Read or
124 Only or higher level locks on the resource.
/Documentation/devicetree/bindings/mfd/
Dbrcm,iproc-cdru.txt1 Broadcom iProc Chip Device Resource Unit (CDRU)
4 chip specific device and resource configurations. This node allows access to
Daltera-a10sr.txt1 * Altera Arria10 Development Kit System Resource Chip
7 System Resource chip
37 resource-manager@0 {
/Documentation/ABI/testing/
Dsysfs-devices-resource_in_use9 current status of the given power resource (0 means that the
10 resource is not in use and therefore it has been turned off).
/Documentation/devicetree/bindings/
Dresource-names.txt6 order as the data in the resource property.
10 Resource Property Supplemental Names Property
18 The -names property must be used in conjunction with the normal resource
/Documentation/driver-api/iio/
Dtriggers.rst6 * :c:func:`devm_iio_trigger_alloc` — Resource-managed iio_trigger_alloc
7 * :c:func:`devm_iio_trigger_free` — Resource-managed iio_trigger_free
8 * :c:func:`devm_iio_trigger_register` — Resource-managed iio_trigger_register
9 * :c:func:`devm_iio_trigger_unregister` — Resource-managed
/Documentation/accounting/
Dpsi.rst17 such resource crunches and the time impact it has on complex workloads
20 Having an accurate measure of productivity losses caused by resource
35 Pressure information for each resource is exported through the
48 tasks are stalled on a given resource.
51 tasks are stalled on a given resource simultaneously. In this state
69 Users can register triggers and use poll() to be woken up when resource
77 /proc/pressure/ representing the resource to be monitored and write the
/Documentation/devicetree/bindings/interconnect/
Dqcom,sdm845.txt6 able to communicate with the BCM through the Resource State Coordinator (RSC)
9 RPMh resource.
/Documentation/firmware-guide/acpi/
Dgpio-properties.rst48 Index of the GpioIo()/GpioInt() resource in _CRS starting from zero.
50 Pin in the GpioIo()/GpioInt() resource. Typically this is zero.
54 Since ACPI GpioIo() resource does not have a field saying whether it is
59 resource, second pin in that resource with the GPIO number of 31.
144 GpioIo()/GpioInt() resource in _CRS starting from zero, the index of the target
145 line in that resource starting from zero, and the active-low flag for that line,
205 There are two main approaches to get GPIO resource from ACPI::
/Documentation/pcmcia/
Ddriver-changes.rst17 - CONF_AUTO_SET_IO : set ioport resources (->resource[0,1])
18 - CONF_AUTO_SET_IOMEM : set first iomem resource (->resource[2])
28 `struct pcmcia_device *p_dev->resource[2,3,4,5]` for up to four ioport
35 `struct pcmcia_device *p_dev->resource[0,1]` for up to two ioport
143 * Resource management. (as of 2.6.8)
/Documentation/hwmon/
Djc42.rst78 http://www.st.com/web/en/resource/technical/document/datasheet/CD00157556.pdf
80 http://www.st.com/web/en/resource/technical/document/datasheet/CD00157558.pdf
82 http://www.st.com/web/en/resource/technical/document/datasheet/CD00266638.pdf
84 http://www.st.com/web/en/resource/technical/document/datasheet/CD00225278.pdf
86 http://www.st.com/web/en/resource/technical/document/datasheet/DM00076709.pdf

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