Home
last modified time | relevance | path

Searched full:revisions (Results 1 – 25 of 44) sorted by relevance

12

/Documentation/hwmon/
Dk8temp.rst24 revisions of K8 except the first two revisions (SH-B0 and SH-B3).
53 For newer revisions of CPU (rev F, socket AM2) there is a mathematically
Dabituguru3.rst15 it to behave as a hwmon IC. There are many different revisions of the
16 firmware and thus effectivly many different revisions of the uGuru.
17 Below is an incomplete list with which revisions are used for which
Dabituguru.rst19 it to behave as a hwmon IC. There are many different revisions of the
20 firmware and thus effectivly many different revisions of the uGuru.
21 Below is an incomplete list with which revisions are used for which
32 .. [1] For revisions 2 and 3 uGuru's the driver can autodetect the
Dk10temp.rst95 will refuse to load on these revisions unless you specify the "force=1"
Dit87.rst217 The IT8716F, IT8718F, IT8720F, IT8721F/IT8758E and later IT8712F revisions
224 not compatible with the older chips and revisions. The 16-bit tachometer mode
Dsis5595.rst25 Supports following revisions:
/Documentation/devicetree/bindings/arm/msm/
Dqcom,saw2.txt10 Multiple revisions of the SAW hardware are supported using these Device Nodes.
11 SAW2 revisions differ in the register offset and configuration data. Also, the
/Documentation/devicetree/bindings/arm/
Dfw-cfg.txt26 revisions / feature bits.
Dqcom.yaml14 device properties like SoC and platform and revisions of those components.
/Documentation/devicetree/bindings/i2c/
Dbrcm,iproc-i2c.txt24 Should contain the I2C interrupt. For certain revisions of the I2C
/Documentation/devicetree/bindings/net/
Dmicrel.txt28 Note that this option in only needed for certain PHY revisions with a
Dsnps,dwc-qos-ethernet.txt21 compatible with earlier revisions of this binding.
/Documentation/devicetree/bindings/iommu/
Darm,smmu-v3.txt4 revisions, replacing the MMIO register interface with in-memory command
/Documentation/virt/kvm/arm/
Dpsci.txt10 observe two different "firmware" revisions. This could cause issues if
/Documentation/devicetree/bindings/memory-controllers/ti/
Demif.txt6 of the EMIF IP and memory parts attached to it. Certain revisions
/Documentation/scsi/
Dlpfc.txt33 In older revisions of the lpfc driver, the driver internally queued i/o
DChangeLog.sym53c8xx219 function chips, since I cannot make sure for what chip revisions
424 - Some 896 chip revisions (all for now :-)), may hang-up if the
514 transactions since those early chip revisions may use such on
590 at least for some chip revisions.
/Documentation/devicetree/bindings/display/msm/
Dmdp5.txt60 The availability of output ports can vary across SoC revisions:
/Documentation/power/
Dsuspend-and-cpuhotplug.rst196 In this case since we probably need to apply different microcode revisions
249 type/model and the need for validating whether the microcode revisions are
/Documentation/devicetree/bindings/cpufreq/
Dti-cpufreq.txt54 * cpu0 has different OPPs depending on SoC revision and some on revisions
/Documentation/filesystems/
Dext2.txt117 filesystems, later revisions can optionally reduce the number of backup
125 what version of the filesystem it is (see the Revisions section below)
178 each name with an inode number. Later revisions of the filesystem also
/Documentation/networking/dsa/
Dbcm_sf2.rst76 pseudo-PHY addresses. Newer revisions of the SF2 hardware have introduced a
/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic.yaml138 Certain revisions of GIC-400 supports MSI/MSI-x via V2M register frame(s).
/Documentation/devicetree/bindings/gpio/
Dnvidia,tegra186-gpio.txt62 GPIO_${port}_INTERRUPT_STATUS_G1_0. Future revisions to the binding could
/Documentation/powerpc/
Dqe_firmware.rst210 The 'soc' structure contains the SOC numbers and revisions used to match
212 check the data in this structure with the SOC number and revisions, and

12