| /Documentation/virt/kvm/ |
| D | ppc-pv.txt | 77 ld rX, -4096(0)
144 mfmsr rX ld rX, magic_page->msr
145 mfsprg rX, 0 ld rX, magic_page->sprg0
146 mfsprg rX, 1 ld rX, magic_page->sprg1
147 mfsprg rX, 2 ld rX, magic_page->sprg2
148 mfsprg rX, 3 ld rX, magic_page->sprg3
149 mfsrr0 rX ld rX, magic_page->srr0
150 mfsrr1 rX ld rX, magic_page->srr1
151 mfdar rX ld rX, magic_page->dar
152 mfdsisr rX lwz rX, magic_page->dsisr
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| /Documentation/networking/device_drivers/freescale/ |
| D | dpaa.txt | 42 -Ports / Tx Rx \ ... / Tx Rx \
59 |Rx | |Rx | |Tx | |Tx | | driver |
78 Rx Dfl FQ = default reception FQ
79 Rx Err FQ = Rx error frames FQ
132 On Rx, buffers for the incoming frames are retrieved from one of the three
149 The driver has Rx and Tx checksum offloading for UDP and TCP. Currently the Rx
151 ethtool. Also, rx-flow-hash and rx-hashing was added. The addition of RSS
176 Traffic coming on the DPAA Rx queues or on the DPAA Tx confirmation
186 received on the default Rx frame queue. The default DPAA Rx frame
196 128 Rx frame queues that are configured to dedicated channels, in a
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| /Documentation/devicetree/bindings/net/ |
| D | micrel-ksz90x1.txt | 49 - rxdv-skew-ps : Skew control of RX CTL pad
52 - rxd0-skew-ps : Skew control of RX data 0 pad
53 - rxd1-skew-ps : Skew control of RX data 1 pad
54 - rxd2-skew-ps : Skew control of RX data 2 pad
55 - rxd3-skew-ps : Skew control of RX data 3 pad
72 - rxc-skew-ps : Skew control of RX clock pad
77 - rxdv-skew-ps : Skew control of RX CTL pad
79 - rxd0-skew-ps : Skew control of RX data 0 pad
80 - rxd1-skew-ps : Skew control of RX data 1 pad
81 - rxd2-skew-ps : Skew control of RX data 2 pad
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| D | keystone-netcp.txt | 135 - rx-channel: the navigator packet dma channel name for rx.
136 - rx-queue: the navigator queue number associated with rx dma channel.
137 - rx-pool: specifies the number of descriptors to be used & the region-id
138 for creating the rx descriptor pool.
141 - rx-queue-depth: number of descriptors in each of the free descriptor
142 queue (FDQ) for the pktdma Rx flow. There can be at
143 present a maximum of 4 queues per Rx flow.
144 - rx-buffer-size: the buffer size for each of the Rx flow FDQ.
231 rx-channel = <22>;
232 rx-pool = <1024 12>;
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| D | lantiq,xrx200-net.txt | 9 - interrupts : TX and RX DMA interrupts. Use interrupt-names "tx" for
10 : the TX interrupt and "rx" for the RX interrupt.
20 interrupt-names = "tx", "rx";
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| D | snps,dwmac.yaml | 78 - description: The interrupt that occurs when Rx exits the LPI state
138 snps,mtl-rx-config:
141 Multiple RX Queues parameters. Phandle to a node that can
143 * snps,rx-queues-to-use, number of RX queues to be used in the
145 * Choose one of these RX scheduling algorithms
146 * snps,rx-sched-sp, Strict priority
147 * snps,rx-sched-wsp, Weighted Strict priority
148 * For each RX queue
159 * snps,priority, RX queue priority (Range 0x0 to 0xF)
229 Force DMA to use the threshold mode for both tx and rx
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| D | xilinx_axienet.txt | 7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
26 specified, the TX/RX DMA interrupts should be on that node
31 - xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the hardware
40 - xlnx,rxcsum : Same values as xlnx,txcsum but for RX checksum offload
49 device (DMA registers and DMA TX/RX interrupts) rather
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| /Documentation/devicetree/bindings/net/can/ |
| D | xilinx_can.txt | 20 - rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in
21 sequential Rx mode).
23 - rx-mailbox-count : Can Rx mailbox buffer count (CAN FD in mailbox Rx
38 rx-fifo-depth = <0x40>;
49 rx-fifo-depth = <0x40>;
60 rx-fifo-depth = <0x20>;
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| /Documentation/devicetree/bindings/mfd/ |
| D | atmel-usart.txt | 25 associated channel and the second one must be RX associated channel.
28 "rx" for RX channel.
30 and the second one must be "rx" as in the examples below.
33 - atmel,use-dma-rx: use of PDC or DMA for receiving data
38 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
40 - rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
54 atmel,use-dma-rx;
71 atmel,use-dma-rx;
75 dma-names = "tx", "rx";
93 dma-names = "tx", "rx";
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| /Documentation/devicetree/bindings/serial/ |
| D | mrvl,pxa-ssp.txt | 15 - dmas: Two dma phandles, one for rx, one for tx
16 - dma-names: Must be "rx", "tx"
29 dma-names = "rx", "tx";
40 dma-names = "rx", "tx";
51 dma-names = "rx", "tx";
62 dma-names = "rx", "tx";
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| D | mvebu-uart.txt | 20 (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
22 UART RX interrupt. A corresponding interrupt-names property must
25 (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
26 respectively the UART TX interrupt and the UART RX interrupt. A
42 interrupt-names = "uart-sum", "uart-tx", "uart-rx";
52 interrupt-names = "uart-tx", "uart-rx";
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| /Documentation/devicetree/bindings/dma/ |
| D | fsl-mxs-dma.txt | 41 interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
43 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
44 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
59 dma-names = "rx", "tx";
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| /Documentation/networking/device_drivers/toshiba/ |
| D | spider_net.txt | 16 The Structure of the RX Ring.
18 The receive (RX) ring is a circular linked list of RX descriptors,
34 spidernet device driver) allocates a set of RX descriptors and RX
45 flowing RX traffic, every descr behind it should be marked "full",
53 and advance the tail pointer. Thus, when there is flowing RX traffic,
55 all of those behind it should be "not-in-use". When RX traffic is not
66 is flowing RX traffic, everything in front of the head pointer should
68 RX traffic is flowing, then the head pointer can catch up to the tail
111 The RX RAM full bug/feature
114 As long as the OS can empty out the RX buffers at a rate faster than
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| /Documentation/devicetree/bindings/sound/ |
| D | fsl-sai.txt | 25 - dma-names : Two dmas have to be defined, "tx" and "rx".
38 - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
40 with Rx) which means both the transmitter and the
61 - If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
62 default synchronous mode (sync Rx with Tx) will be used, which means both
65 - fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive.
77 dma-names = "tx", "rx";
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| D | allwinner,sun4i-a10-i2s.yaml | 79 - description: RX DMA Channel
83 data. In such a case, the RX DMA channel is to be omitted.
88 - const: rx
93 data. In such a case, the RX name is to be omitted.
99 - description: RX DMA Channel
104 - const: rx
129 dma-names = "rx", "tx";
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| D | tdm-slot.txt | 9 dai-tdm-slot-rx-mask : Receive direction slot mask, optional
15 dai-tdm-slot-rx-mask = <1 0>;
20 tx and rx masks.
22 For snd_soc_of_xlate_tdm_slot_mask(), the tx and rx masks will use a 1 bit
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| D | davinci-mcasp-audio.txt | 21 (0 - INACTIVE, 1 - TX, 2 - RX)
26 identifiers must be "rx" and "tx".
32 - rx-num-evt : FIFO levels.
41 - interrupt-names : Known interrupt names are "tx" and "rx"
75 interrupt-names = "tx", "rx";
79 0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */
84 rx-num-evt = <1>;
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| D | ingenic,jz4740-i2s.txt | 8 - dmas: DMA controller phandle and DMA request line for I2S Tx and Rx channels
9 - dma-names: Must be "tx" and "rx"
21 dma-names = "tx", "rx";
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| /Documentation/devicetree/bindings/media/ |
| D | st-rc.txt | 10 - rx-mode: can be "infrared" or "uhf". This property specifies the L1
11 protocol used for receiving remote control signals. rx-mode should
12 be present iff the rx pins are wired up.
28 rx-mode = "infrared";
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-rockchip.txt | 30 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
32 - dma-names: DMA request names should include "tx" and "rx" if present.
33 - rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
34 Rx data (may need to be fine tuned for high capacitance lines).
48 dma-names = "tx", "rx";
49 rx-sample-delay-ns = <10>;
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| D | microchip,spi-pic32.txt | 8 - interrupt-names: Should be "fault", "rx", "tx" in order.
18 named "spi-tx" for transmit and named "spi-rx" for receive.
28 interrupt-names = "fault", "rx", "tx";
33 dma-names = "spi-rx", "spi-tx";
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| /Documentation/networking/ |
| D | af_xdp.rst | 24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
50 TX ring. In summary, the RX and FILL rings are used for the RX path
62 then receive frame addr references in its own RX ring that point to
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| /Documentation/devicetree/bindings/mmc/ |
| D | jz4740.txt | 18 as described in the generic DMA client binding. A tx and rx
20 - dma-names: RX and TX DMA request names.
21 Should be "rx" and "tx", in that order.
38 dma-names = "rx", "tx";
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| /Documentation/networking/device_drivers/amazon/ |
| D | ena.txt | 21 processing by providing multiple Tx/Rx queue pairs (the maximum number
23 interrupt vector per Tx/Rx queue pair, adaptive interrupt moderation,
51 ena_eth_com.[ch] - Tx/Rx data path.
118 I/O operations are based on Tx and Rx Submission Queues (Tx SQ and Rx
137 The Rx SQs support only the regular mode.
143 The driver supports multi-queue for both Tx and Rx. This has various
157 and Rx directions). The driver assigns an additional dedicated MSI-X vector
169 <interface name>-Tx-Rx-<queue index>
184 parameters are supported by the driver: tx-usecs, rx-usecs
190 By default ENA driver applies adaptive coalescing on Rx traffic and
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| /Documentation/media/uapi/cec/ |
| D | cec-pin-error-inj.rst | 42 # clear clear all rx and tx error injections
43 # rx-clear clear all rx error injections
45 # <op> clear clear all rx and tx error injections for <op>
46 # <op> rx-clear clear all rx error injections for <op>
49 # RX error injection:
50 # <op>[,<mode>] rx-nack NACK the message instead of sending an ACK
51 # <op>[,<mode>] rx-low-drive <bit> force a low-drive condition at this bit position
52 # <op>[,<mode>] rx-add-byte add a spurious byte to the received CEC message
53 # <op>[,<mode>] rx-remove-byte remove the last byte from the received CEC message
54 # <op>[,<mode>] rx-arb-lost <poll> generate a POLL message to trigger an arbitration lost
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