Searched +full:scl +full:- +full:output +full:- +full:only (Results 1 – 4 of 4) sorted by relevance
| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wolfram Sang <wolfram@the-dreams.de> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 18 - const: i2c-gpio 20 sda-gpios: 24 from <dt-bindings/gpio/gpio.h> since the signal is by definition 28 scl-gpios: [all …]
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| D | i2c-s3c2410.txt | 6 - compatible: value should be either of the following. 7 (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c. 8 (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c. 9 (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used 11 (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as 13 - reg: physical base address of the controller and length of memory mapped 15 - interrupts: interrupt number to the cpu. 16 - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges. 18 Required for all cases except "samsung,s3c2440-hdmiphy-i2c": 19 - Samsung GPIO variant (deprecated): [all …]
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| /Documentation/driver-api/gpio/ |
| D | driver.rst | 17 lines must conform to the definition: General Purpose Input/Output. If the 26 between 0 and n-1, n being the number of GPIOs managed by the chip. 29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO 30 lines are handled by one bit per line in a 32-bit register, it makes sense to 44 So for example one platform could use global numbers 32-159 for GPIOs, with a 46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type 47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy 49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders. 60 - methods to establish GPIO line direction 61 - methods used to access GPIO line values [all …]
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| /Documentation/driver-api/ |
| D | pinctl.rst | 9 - Enumerating and naming controllable pins 11 - Multiplexing of pins, pads, fingers (etc) see below for details 13 - Configuration of pins, pads, fingers (etc), such as software-controlled 14 biasing and driving mode specific pins, such as pull-up/down, open drain, 17 Top-level interface 22 - A pin controller is a piece of hardware, usually a set of registers, that 28 - PINS are equal to pads, fingers, balls or whatever packaging input or 29 output line you want to control and these are denoted by unsigned integers 32 be sparse - i.e. there may be gaps in the space with numbers where no 98 See for example arch/arm/mach-u300/Kconfig for an example. [all …]
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