Searched full:secure (Results 1 – 25 of 121) sorted by relevance
12345
| /Documentation/devicetree/bindings/arm/ |
| D | secure.txt | 1 * ARM Secure world bindings
4 "Normal" and "Secure". Most devicetree consumers (including the Linux
6 world or the Secure world. However some devicetree consumers are
8 visible only in the Secure address space, only in the Normal address
10 virtual machine which boots Secure firmware and wants to tell the
13 The general principle of the naming scheme for Secure world bindings
14 is that any property that needs a different value in the Secure world
15 can be supported by prefixing the property name with "secure-". So for
16 instance "secure-foo" would override "foo". For property names with
17 a vendor prefix, the Secure variant of "vendor,foo" would be
[all …]
|
| D | pmu.yaml | 71 secure-reg-access:
74 Indicates that the ARMv7 Secure Debug Enable Register
76 any setup required that is only possible in ARMv7 secure
82 in Non-secure state.
|
| D | juno,scpi.txt | 8 - compatible : should be "arm,juno-sram-ns" for Non-secure SRAM
14 - compatible : should be "arm,juno-scp-shmem" for Non-secure SRAM based
|
| /Documentation/devicetree/bindings/crypto/ |
| D | inside-secure-safexcel.txt | 1 Inside Secure SafeXcel cryptographic engine
4 - compatible: Should be "inside-secure,safexcel-eip197b",
5 "inside-secure,safexcel-eip197d" or
6 "inside-secure,safexcel-eip97ies".
21 - "inside-secure,safexcel-eip197" is equivalent to
22 "inside-secure,safexcel-eip197b".
23 - "inside-secure,safexcel-eip97" is equivalent to
24 "inside-secure,safexcel-eip97ies".
29 compatible = "inside-secure,safexcel-eip197b";
|
| /Documentation/devicetree/bindings/iommu/ |
| D | qcom,iommu.txt | 6 to non-secure vs secure interrupt line.
31 - qcom,iommu-secure-id : secure-id.
37 - "qcom,msm-iommu-v1-ns" : non-secure context bank
38 - "qcom,msm-iommu-v1-sec" : secure context bank
46 for routing of context bank irq's to secure vs non-
47 secure lines. (Ie. if the iommu contains secure
63 qcom,iommu-secure-id = <17>;
89 qcom,iommu-secure-id = <18>;
|
| D | msm,iommu-v0.txt | 12 support secure mode two interrupts must be specified, for non-secure and
13 secure mode, in that order. For instances that don't support secure mode a
|
| D | renesas,ipmmu-vmsa.txt | 35 support secure mode two interrupts must be specified, for non-secure and
36 secure mode, in that order. For instances that don't support secure mode a
|
| /Documentation/devicetree/bindings/arm/amlogic/ |
| D | amlogic,meson-gx-ao-secure.yaml | 5 $id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#"
15 secure firmware.
22 const: amlogic,meson-gx-ao-secure
29 - const: amlogic,meson-gx-ao-secure
48 ao-secure@140 {
49 compatible = "amlogic,meson-gx-ao-secure", "syscon";
|
| /Documentation/devicetree/bindings/firmware/meson/ |
| D | meson_sm.txt | 1 * Amlogic Secure Monitor
3 In the Amlogic SoCs the Secure Monitor code is used to provide access to the
6 Required properties for the secure monitor node:
12 sm: secure-monitor {
|
| /Documentation/powerpc/ |
| D | ultravisor.rst | 15 POWER 9 that enables Secure Virtual Machines (SVMs). DD2.3 chips
56 process is running in secure mode, MSR(S) bit 41. MSR(S)=1, process
57 is in secure mode, MSR(s)=0 process is in normal mode.
63 the VM it is returning to is secure.
73 **Secure Mode MSR Settings**
101 * Memory is partitioned into secure and normal memory. Only processes
102 that are running in secure mode can access secure memory.
104 * The hardware does not allow anything that is not running secure to
105 access secure memory. This means that the Hypervisor cannot access
110 * I/O systems are not allowed to directly address secure memory. This
[all …]
|
| /Documentation/devicetree/bindings/rng/ |
| D | omap_rng.txt | 1 OMAP SoC and Inside-Secure HWRNG Module
9 - "inside-secure,safexcel-eip76" for SoCs with EIP76 IP block
14 Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76"
16 "inside-secure,safexcel-eip76" compatible, the second clock is
34 compatible = "inside-secure,safexcel-eip76";
|
| D | omap3_rom_rng.txt | 3 Secure SoCs may provide RNG via secure ROM calls like Nokia N900 does. The
4 implementation can depend on the SoC secure ROM used.
|
| /Documentation/devicetree/bindings/firmware/ |
| D | intel,stratix10-svc.txt | 4 processor system (HPS) and Secure Device Manager (SDM). When the FPGA is
10 communication with SDM, only the secure world of software (EL3, Exception
18 driver also manages secure monitor call (SMC) to communicate with secure monitor
28 smc - Secure Monitor Call
|
| D | qcom,scm.txt | 1 QCOM Secure Channel Manager (SCM)
3 Qualcomm processors include an interface to communicate to the secure firmware.
|
| /Documentation/devicetree/bindings/sram/ |
| D | samsung-sram.txt | 9 declaration. These nodes are of two types depending upon secure or
10 non-secure execution environment.
14 "samsung,exynos4210-sysram" : for Secure SYSRAM
15 "samsung,exynos4210-sysram-ns" : for Non-secure SYSRAM
|
| /Documentation/devicetree/bindings/misc/ |
| D | brcm,kona-smc.txt | 1 Broadcom Secure Monitor Bounce buffer
4 used for non-secure to secure communications.
|
| /Documentation/devicetree/bindings/arm/sunxi/ |
| D | smp-sram.txt | 4 Allwinner's A80 SoC uses part of the secure sram for hotplugging of the
13 ../../sram/sunxi-sram.txt. This SRAM is secure only and not mappable to
16 Also there are no "secure-only" properties. The implementation should
29 /* 256 KiB secure SRAM at 0x20000 */
|
| /Documentation/devicetree/bindings/mailbox/ |
| D | ti,secure-proxy.txt | 1 Texas Instruments' Secure Proxy
4 The Texas Instruments' secure proxy is a mailbox controller that has
15 - compatible: Shall be "ti,am654-secure-proxy"
32 compatible = "ti,am654-secure-proxy";
|
| D | arm-mhu.txt | 10 The last channel is specified to be a 'Secure' resource, hence can't be
34 <0 37 4>; /* Secure */
|
| /Documentation/devicetree/bindings/timer/ |
| D | ti,timer.txt | 32 - ti,timer-secure: Indicates the timer is reserved on a secure OMAP device
43 ti,timer-secure;
|
| /Documentation/driver-api/firmware/ |
| D | other_interfaces.rst | 19 higher than the kernel is granted. Such secure features include
25 drivers to request access to the secure features. The requests are queued
27 of the requests on to a secure monitor (EL3).
|
| /Documentation/devicetree/bindings/arm/samsung/ |
| D | samsung-boards.txt | 76 - firmware node, specifying presence and type of secure firmware:
77 - compatible: only "samsung,secure-firmware" is currently supported
78 - reg: address of non-secure SYSRAM used for communication with firmware
81 compatible = "samsung,secure-firmware";
|
| /Documentation/ |
| D | tee.txt | 8 secure environment, for example, TrustZone on ARM CPUs, or a separate
9 secure co-processor etc. A TEE driver handles the details needed to
75 separate secure co-processor.
88 User space Kernel Secure world
108 RPC (Remote Procedure Call) are requests from secure world to kernel driver
|
| /Documentation/devicetree/bindings/powerpc/4xx/ |
| D | akebono.txt | 14 1.a) The Secure Digital Host Controller Interface (SDHCI) node
16 Represent the Secure Digital Host Controller Interfaces.
|
| /Documentation/devicetree/bindings/soc/rockchip/ |
| D | grf.txt | 7 - GRF, used for general non-secure system,
8 - SGRF, used for general secure system,
|
12345