| /Documentation/devicetree/bindings/net/ |
| D | snps,dwmac.yaml | 4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# 23 - snps,dwmac 24 - snps,dwmac-3.50a 25 - snps,dwmac-3.610 26 - snps,dwmac-3.70a 27 - snps,dwmac-3.710 28 - snps,dwmac-4.00 29 - snps,dwmac-4.10a 30 - snps,dwxgmac 31 - snps,dwxgmac-2.10 [all …]
|
| D | snps,dwc-qos-ethernet.txt | 14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10" 16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10" 18 - "snps,dwc-qos-ethernet-4.10" 20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be 72 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10": 78 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10": 83 - "snps,dwc-qos-ethernet-4.10" (deprecated): 97 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10": 99 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10": 101 - "snps,dwc-qos-ethernet-4.10" (deprecated): [all …]
|
| D | qcom,ethqos.txt | 43 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; 44 snps,reset-active-low; 46 snps,txpbl = <8>; 47 snps,rxpbl = <2>; 48 snps,aal; 49 snps,tso; 57 compatible = "snps,dwmac-mdio";
|
| D | stm32-dwmac.txt | 10 "snps,dwmac-3.50a" to select IP version. 12 glue, and "snps,dwmac-4.20a" to select IP version. 33 compatible = "st,stm32-dwmac", "snps,dwmac-3.50a"; 41 snps,pbl = <8>; 42 snps,mixed-burst;
|
| D | amlogic,meson-dwmac.yaml | 14 # We need a select here so we don't match all nodes with 'snps,dwmac' 29 - $ref: "snps,dwmac.yaml#" 83 - snps,dwmac-3.70a 84 - snps,dwmac 106 compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
|
| D | sti-dwmac.txt | 37 compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710"; 51 snps,pbl = <32>; 52 snps,mixed-burst;
|
| /Documentation/devicetree/bindings/usb/ |
| D | dwc3.txt | 7 - compatible: must be "snps,dwc3" 40 - snps,usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM 41 - snps,usb3_lpm_capable: determines if platform is USB3 LPM capable 42 - snps,dis-start-transfer-quirk: when set, disable isoc START TRANSFER command 45 - snps,disable_scramble_quirk: true when SW should disable data scrambling. 47 - snps,has-lpm-erratum: true when DWC3 was configured with LPM Erratum enabled 48 - snps,lpm-nyet-threshold: LPM NYET threshold 49 - snps,u2exit_lfps_quirk: set if we want to enable u2exit lfps quirk 50 - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk 51 - snps,req_p1p2p3_quirk: when set, the core will always request for [all …]
|
| D | dwc2.txt | 9 - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc; 10 - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc; 11 - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc; 19 - snps,dwc2: A generic DWC2 USB controller with default parameters. 45 - snps,need-phy-for-wake: If present indicates that the phy needs to be left 47 - snps,reset-phy-on-wake: If present indicates that we need to reset the PHY when 56 compatible = "ralink,rt3050-usb, snps,dwc2"; 63 snps,need-phy-for-wake;
|
| /Documentation/devicetree/bindings/dma/ |
| D | snps,dw-axi-dmac.txt | 4 - compatible: "snps,axi-dma-1.01a" 9 - snps,dma-masters: Number of AXI masters supported by the hardware. 10 - snps,data-width: Maximum AXI data width supported by hardware. 12 - snps,priority: Priority of channel. Array size is equal to the number of 15 - snps,block-size: Maximum block size supported by the controller channel. 19 - snps,axi-max-burst-len: Restrict master AXI burst length by value specified 26 compatible = "snps,axi-dma-1.01a"; 34 snps,dma-masters = <2>; 35 snps,data-width = <3>; 36 snps,block-size = <4096 4096 4096 4096>; [all …]
|
| /Documentation/devicetree/bindings/ufs/ |
| D | tc-dwc-g210-pltfrm.txt | 8 "snps,g210-tc-6.00-20bit" 9 "snps,g210-tc-6.00-40bit" 11 "snps,dwc-ufshcd-1.40a" 21 compatible = "snps,g210-tc-6.00-40bit", 22 "snps,dwc-ufshcd-1.40a",
|
| /Documentation/devicetree/bindings/gpio/ |
| D | snps-dwapb-gpio.txt | 4 - compatible : Should contain "snps,dw-apb-gpio" 13 - compatible : "snps,dw-apb-gpio-port" 35 - snps,nr-gpios : The number of pins in the port, a single cell. 41 compatible = "snps,dw-apb-gpio"; 47 compatible = "snps,dw-apb-gpio-port"; 50 snps,nr-gpios = <8>; 59 compatible = "snps,dw-apb-gpio-port"; 62 snps,nr-gpios = <8>;
|
| D | snps,creg-gpio.txt | 4 - compatible : "snps,creg-gpio-hsdk" or "snps,creg-gpio-axs10x". 16 compatible = "snps,creg-gpio-hsdk";
|
| /Documentation/devicetree/bindings/clock/ |
| D | snps,hsdk-pll-clock.txt | 8 - compatible: should be "snps,hsdk-<name>-pll-clock" 9 "snps,hsdk-core-pll-clock" 10 "snps,hsdk-gp-pll-clock" 11 "snps,hsdk-hdmi-pll-clock" 24 compatible = "snps,hsdk-core-pll-clock";
|
| D | snps,pll-clock.txt | 8 - compatible: should be "snps,axs10x-<name>-pll-clock" 9 "snps,axs10x-arc-pll-clock" 10 "snps,axs10x-pgu-pll-clock" 24 compatible = "snps,axs10x-arc-pll-clock";
|
| /Documentation/devicetree/bindings/serial/ |
| D | snps-dw-apb-uart.yaml | 4 $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml# 34 - const: snps,dw-apb-uart 39 - const: snps,dw-apb-uart 40 - const: snps,dw-apb-uart 59 snps,uart-16550-compatible: 106 compatible = "snps,dw-apb-uart"; 121 compatible = "snps,dw-apb-uart"; 132 compatible = "snps,dw-apb-uart";
|
| /Documentation/devicetree/bindings/reset/ |
| D | snps,dw-reset.txt | 10 "snps,dw-high-reset" - for active high configuration 11 "snps,dw-low-reset" - for active low configuration 21 compatible = "snps,dw-high-reset"; 27 compatible = "snps,dw-low-reset";
|
| D | snps,hsdk-reset.txt | 8 - compatible: should be "snps,hsdk-reset". 16 compatible = "snps,hsdk-reset"; 28 The index could be found in <dt-bindings/reset/snps,hsdk-reset.h>
|
| /Documentation/devicetree/bindings/rtc/ |
| D | dw-apb.txt | 5 "snps,dw-apb-timer" 6 "snps,dw-apb-timer-sp" <DEPRECATED> 7 "snps,dw-apb-timer-osc" <DEPRECATED> 27 compatible = "snps,dw-apb-timer";
|
| /Documentation/devicetree/bindings/pci/ |
| D | axis,artpec6-pcie.txt | 7 - compatible: "axis,artpec6-pcie", "snps,dw-pcie" for ARTPEC-6 in RC mode; 8 "axis,artpec6-pcie-ep", "snps,dw-pcie" for ARTPEC-6 in EP mode; 9 "axis,artpec7-pcie", "snps,dw-pcie" for ARTPEC-7 in RC mode; 10 "axis,artpec7-pcie-ep", "snps,dw-pcie" for ARTPEC-7 in EP mode; 27 compatible = "axis,artpec6-pcie", "snps,dw-pcie";
|
| D | designware-pcie.txt | 5 "snps,dw-pcie" for RC mode; 6 "snps,dw-pcie-ep" for EP mode; 36 - snps,enable-cdm-check: This is a boolean property and if present enables 54 compatible = "snps,dw-pcie"; 69 compatible = "snps,dw-pcie-ep";
|
| /Documentation/devicetree/bindings/timer/ |
| D | snps,arc-timer.txt | 10 - compatible : should be "snps,arc-timer" 18 compatible = "snps,arc-timer"; 25 compatible = "snps,arc-timer";
|
| D | snps,archs-rtc.txt | 6 - compatible : should be "snps,archs-rtc" 12 compatible = "snps,arc-rtc";
|
| D | snps,archs-gfrc.txt | 6 - compatible : should be "snps,archs-gfrc" 12 compatible = "snps,archs-gfrc";
|
| /Documentation/devicetree/bindings/arc/ |
| D | archs-pct.txt | 11 "snps,archs-pct" 16 compatible = "snps,archs-pct";
|
| /Documentation/devicetree/bindings/serio/ |
| D | snps-arc_ps2.txt | 4 - compatible : "snps,arc_ps2" 12 compatible = "snps,arc_ps2";
|