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| /Documentation/devicetree/bindings/nios2/ |
| D | nios2.txt | 3 This binding specifies what properties available in the device tree
13 - interrupt-controller: Specifies that the node is an interrupt controller
14 - #interrupt-cells: Specifies the number of cells needed to encode an
21 - altr,pid-num-bits: Specifies the number of bits to use to represent the process
23 - altr,tlb-num-ways: Specifies the number of set-associativity ways in the TLB.
24 - altr,tlb-num-entries: Specifies the number of entries in the TLB.
25 - altr,tlb-ptr-sz: Specifies size of TLB pointer.
26 - altr,has-mul: Specifies CPU hardware multipy support, should be 1.
27 - altr,has-mmu: Specifies CPU support MMU support, should be 1.
28 - altr,has-initda: Specifies CPU support initda instruction, should be 1.
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| /Documentation/devicetree/bindings/usb/ |
| D | octeon-usb.txt | 9 - reg: specifies the physical base address of the USBN block and
12 - #address-cells: specifies the number of cells needed to encode an
15 - #size-cells: specifies the number of cells used to represent the size
18 - ranges: specifies the translation between child address space and parent
40 - reg: specifies the physical base address of the USBC block and
43 - interrupts: specifies the interrupt number for the USB controller.
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| D | usb251xb.txt | 46 - sp-disabled-ports : Specifies the ports which will be self-power disabled
47 - bp-disabled-ports : Specifies the ports which will be bus-power disabled
48 - sp-max-total-current-microamp: Specifies max current consumed by the hub
52 - bp-max-total-current-microamp: Specifies max current consumed by the hub
56 - sp-max-removable-current-microamp: Specifies max current consumed by the hub
60 - bp-max-removable-current-microamp: Specifies max current consumed by the hub
64 - power-on-time-ms : Specifies the time it takes from the time the host
67 - swap-dx-lanes : Specifies the ports which will swap the differential-pair
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| /Documentation/devicetree/bindings/mmc/ |
| D | fsl-esdhc.txt | 25 - clock-frequency : specifies eSDHC base clock frequency.
28 - sdhci,wp-inverted : specifies that eSDHC controller reports
31 - sdhci,1-bit-only : specifies that a controller can only handle
34 - sdhci,auto-cmd12: specifies that a controller can only handle auto
36 - voltage-ranges : two cells are required, first cell specifies minimum
37 slot voltage (mV), second cell specifies maximum slot voltage (mV).
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| /Documentation/devicetree/bindings/pci/ |
| D | ralink,rt3883-pci.txt | 9 - reg: specifies the physical base address of the controller and
12 - #address-cells: specifies the number of cells needed to encode an
15 - #size-cells: specifies the number of cells used to represent the size
18 - ranges: specifies the translation between child address space and parent
37 - #address-cells: specifies the number of cells needed to encode an
41 - #interrupt-cells: specifies the number of cells needed to encode an
44 - interrupts: specifies the interrupt source of the parent interrupt
52 - #address-cells: specifies the number of cells needed to encode an
55 - #size-cells: specifies the number of cells used to represent the size
58 - #interrupt-cells: specifies the number of cells needed to encode an
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| /Documentation/admin-guide/cgroup-v1/ |
| D | blkio-controller.rst | 97 - Specifies per cgroup weight. This is default weight of the group
136 third field specifies the disk time allocated to group in
142 third field specifies the number of sectors transferred by the
149 device, third field specifies the operation type and the fourth field
150 specifies the number of bytes.
156 device, third field specifies the operation type and the fourth field
157 specifies the number of IOs.
170 specifies the operation type and the fourth field specifies the
185 minor number of the device, third field specifies the operation type
186 and the fourth field specifies the io_wait_time in ns.
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| /Documentation/devicetree/bindings/net/nfc/ |
| D | nfcmrvl.txt | 11 - pintctrl-0: Specifies the pin control groups used for this controller.
13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames.
16 - flow-control: Specifies that the chip is using RTS/CTS.
17 - break-control: Specifies that the chip needs specific break management.
20 - i2c-int-falling: Specifies that the chip read event shall be trigged on
22 - i2c-int-rising: Specifies that the chip read event shall be trigged on
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| D | st-nci-spi.txt | 11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - ese-present: Specifies that an ese is physically connected to the nfc
14 - uicc-present: Specifies that the uicc swp signal can be physically
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| D | st21nfca.txt | 11 - pintctrl-0: Specifies the pin control groups used for this controller.
12 - ese-present: Specifies that an ese is physically connected to the nfc
14 - uicc-present: Specifies that the uicc swp signal can be physically
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| D | st-nci-i2c.txt | 12 - pintctrl-0: Specifies the pin control groups used for this controller.
13 - ese-present: Specifies that an ese is physically connected to the nfc
15 - uicc-present: Specifies that the uicc swp signal can be physically
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| /Documentation/devicetree/bindings/net/ |
| D | cpsw.txt | 14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
17 - mac_control : Specifies Default MAC control register content
19 - slaves : Specifies number for slaves
20 - active_slave : Specifies the slave to use for time stamping,
22 - cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection
30 - dual_emac : Specifies Switch to act as Dual EMAC
51 - dual_emac_res_vlan : Specifies VID to be used to segregate the ports
52 - phy_id : Specifies slave phy id (deprecated, use phy-handle)
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| /Documentation/devicetree/bindings/security/tpm/ |
| D | ibmvtpm.txt | 7 - device_type : specifies type of virtual device
13 - ibm,#dma-address-cells: specifies the number of cells that are used to
16 - ibm,#dma-size-cells : specifies the number of cells that are used to
18 - ibm,my-dma-window : specifies DMA window associated with this virtual
20 - ibm,loc-code : specifies the unique and persistent location code
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | mscc,ocelot-icpu-intr.txt | 6 - reg : Specifies base physical address and size of the registers.
8 - #interrupt-cells : Specifies the number of cells needed to encode an
10 - interrupts : Specifies the CPU interrupt the controller is connected to.
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| D | loongson,ls1x-intc.txt | 7 - reg : Specifies base physical address and size of the registers.
9 - #interrupt-cells : Specifies the number of cells needed to encode an
11 - interrupts : Specifies the CPU interrupt the controller is connected to.
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| D | img,meta-intc.txt | 3 This binding specifies what properties must be available in the device tree
8 - compatible: Specifies the compatibility list for the interrupt controller.
11 - num-banks: Specifies the number of interrupt banks (each of which can
17 - #interrupt-cells: Specifies the number of cells needed to encode an
20 - #address-cells: Specifies the number of cells needed to encode an
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| D | ingenic,intc.txt | 11 - reg : Specifies base physical address and size of the registers.
13 - #interrupt-cells : Specifies the number of cells needed to encode an
15 - interrupts : Specifies the CPU interrupt the controller is connected to.
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| D | brcm,l2-intc.txt | 7 - reg: specifies the base physical address and size of the registers
9 - #interrupt-cells: specifies the number of cells needed to encode an
11 - interrupts: specifies the interrupt line in the interrupt-parent irq space
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| D | open-pic.txt | 3 This binding specifies what properties must be available in the device tree
13 - compatible: Specifies the compatibility list for the PIC. The type
16 - reg: Specifies the base physical address(s) and size(s) of this
22 - #interrupt-cells: Specifies the number of cells needed to encode an
25 - #address-cells: Specifies the number of cells needed to encode an
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpic-msgr.txt | 3 This binding specifies what properties must be available in the device tree
9 - compatible: Specifies the compatibility list for the message register
14 - reg: Specifies the base physical address(s) and size(s) of the
18 - interrupts: Specifies a list of interrupt-specifiers which are available
25 - mpic-msgr-receive-mask: Specifies what registers in the containing block
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| D | srio-rmu.txt | 21 Definition: A standard property. Specifies the physical address and
52 Definition: A standard property. Specifies the physical address and
59 Definition: Specifies the interrupts generated by this device. The
82 Definition: A standard property. Specifies the physical address and
89 Definition: Specifies the interrupts generated by this device. The
112 Definition: A standard property. Specifies the physical address and
119 Definition: Specifies the interrupts generated by this device. The
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| /Documentation/devicetree/bindings/arm/socionext/ |
| D | cache-uniphier.txt | 12 - cache-unified: specifies the cache is a unified cache.
13 - cache-size: specifies the size in bytes of the cache
14 - cache-sets: specifies the number of associativity sets of the cache
15 - cache-line-size: specifies the line size in bytes
16 - cache-level: specifies the level in the cache hierarchy. The value should
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| /Documentation/devicetree/bindings/timer/ |
| D | nxp,sysctr-timer.txt | 11 - reg : Specifies the base physical address and size of the comapre
14 - clocks : Specifies the counter clock.
15 - clock-names: Specifies the clock's name of this module
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| /Documentation/devicetree/bindings/riscv/ |
| D | sifive-l2-cache.txt | 12 - cache-block-size: Specifies the block size in bytes of the cache.
17 - cache-sets: Specifies the number of associativity sets of the cache.
20 - cache-size: Specifies the size in bytes of the cache. Should be 2097152
22 - cache-unified: Specifies the cache is a unified cache
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-ocores.txt | 31 clocks are, then clock-frequency specifies i2c controller clock frequency.
34 - if clocks is present it specifies i2c controller clock. clock-frequency
35 property specifies i2c bus frequency.
36 - if opencores,ip-clock-frequency is present it specifies i2c controller
37 clock frequency. clock-frequency property specifies i2c bus frequency.
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| /Documentation/devicetree/bindings/power/reset/ |
| D | qcom,pon.txt | 14 -reg: Specifies the physical address of the pon register
17 -pwrkey: Specifies the subnode pwrkey and should follow the
19 -resin: Specifies the subnode resin and should follow the
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