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/Documentation/devicetree/bindings/display/panel/
Dtpo,tpg110.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Thierry Reding <thierry.reding@gmail.com>
17 and other properties, and has a control interface over 3WIRE
18 SPI. By talking to the TPG110 over SPI, the strapped properties
20 self-describing.
22 +--------+
23 SPI -> | TPO | -> physical display
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Dkingdisplay,kd035g6-54nt.txt1 King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
4 - compatible: should be "kingdisplay,kd035g6-54nt"
5 - power-supply: See panel-common.txt
6 - reset-gpios: See panel-common.txt
9 - backlight: see panel-common.txt
11 The generic bindings for the SPI slaves documented in [1] also apply.
17 [1]: Documentation/devicetree/bindings/spi/spi-bus.txt
22 &spi {
24 compatible = "kingdisplay,kd035g6-54nt";
27 spi-max-frequency = <3125000>;
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/Documentation/devicetree/bindings/spi/
Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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/Documentation/devicetree/bindings/rtc/
Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
14 Required SPI properties:
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
32 spi@901c {
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/Documentation/devicetree/bindings/display/
Dmulti-inno,mi0283qt.txt1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
6 The node for this driver must be a child node of a SPI controller, hence
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
11 the panel interface mode (IM[3:0] pins):
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
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/Documentation/spi/
Dspi-lm70llp.rst2 spi_lm70llp : LM70-LLP parport-to-SPI adapter
15 -----------
17 temperature sensor evaluation board to the kernel's SPI core subsystem.
19 This is a SPI master controller driver. It can be used in conjunction with
20 (layered under) the LM70 logical driver (a "SPI protocol driver").
22 into a SPI bus with a single device, which will be driven by the generic
27 --------------------
28 The schematic for this particular board (the LM70EVAL-LLP) is
39 D0 2 - -
40 D1 3 --> V+ 5
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Dbutterfly.rst2 spi_butterfly - parport-to-butterfly adapter driver
9 sensors, LCD, flash, toggle stick, and more. You can use AVR-GCC to
20 SPI protocol drivers interact with the AVR, and could even let the AVR
22 easily with a "real SPI controller", instead of this bitbanger.
25 The first cable connections will hook Linux up to one SPI bus, with the
28 connector pins (used also on non-Butterfly AVR boards). On the parport
32 Signal Butterfly Parport (DB-25)
35 RESET J403.nRST pin 3/D1
43 (a) flash new firmware that disables SPI (set PRR.2, and disable pullups
44 by clearing PORTB.[0-3]); (b) configure the mtd_dataflash driver; and
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Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
24 in parallel. All SPI slaves support chipselects; they are usually active
29 SPI slave functions are usually not interoperable between vendors
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/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5200.txt2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
39 "fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to
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/Documentation/devicetree/bindings/
Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Trivial I2C and SPI devices that have simple device tree bindings
10 - Rob Herring <robh@kernel.org>
13 This is a list of trivial I2C and SPI devices that have simple device tree
28 - enum:
29 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
30 - ad,ad7414
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/Documentation/networking/dsa/
Dsja1105.rst10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
17 These are SPI-managed automotive switches, with all ports being gigabit
21 set-and-forget use, with minimal dynamic interaction at runtime. They
23 with CRC and table headers, and sent over SPI.
56 Also the configuration is write-only (software cannot read it back from the
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/Documentation/translations/zh_CN/
Dgpio.txt1 Chinese translated version of Documentation/admin-guide/gpio
12 ---------------------------------------------------------------------
13 Documentation/admin-guide/gpio 的中文翻译
26 ---------------------------------------------------------------------
47 匮乏的 SOC。同时还有通过 I2C 或 SPI 串行总线连接的“GPIO扩展器”
53 - 输出值可写 (高电平=1，低电平=0)。一些芯片也有如何驱动这些值的选项,
57 - 输入值可读(1、0)。一些芯片支持引脚在配置为“输出”时回读，这对于类似
61 - 输入通常可作为 IRQ 信号,一般是沿触发,但有时是电平触发。这样的 IRQ
64 - 通常一个 GPIO 根据不同产品电路板的需求,可以配置为输入或输出,也有仅
67 - 大部分 GPIO 可以在持有自旋锁时访问,但是通常由串行总线扩展的 GPIO
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/Documentation/driver-api/gpio/
Ddriver.rst26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
61 - methods used to access GPIO line values
62 - method to set electrical configuration for a given GPIO line
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