Searched +full:spi +full:- +full:gpio (Results 1 – 25 of 146) sorted by relevance
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,kirkwood-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6180-pinctrl",
8 "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",
9 "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl",
10 "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl"
11 - reg: register specifier of MPP registers
14 It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.
24 mpp0 0 gpio, nand(io2), spi(cs)
25 mpp1 1 gpo, nand(io3), spi(mosi)
26 mpp2 2 gpo, nand(io4), spi(sck)
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| D | pinctrl-mcp23s08.txt | 2 8-/16-bit I/O expander with serial interface (I2C/SPI)
5 - compatible : Should be
6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
11 - "microchip,mcp23s08" for 8 GPIO SPI version
12 - "microchip,mcp23s17" for 16 GPIO SPI version
13 - "microchip,mcp23s18" for 16 GPIO SPI version
14 - "microchip,mcp23008" for 8 GPIO I2C version or
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
14 dedicated GPIO lines.
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
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| D | brcm,bcm2835-aux-spi.txt | 3 The BCM2835 contains two forms of SPI master controller, one known simply as
4 SPI0, and the other known as the "Universal SPI Master"; part of the
8 - compatible: Should be "brcm,bcm2835-aux-spi".
9 - reg: Should contain register location and length for the spi block
10 - interrupts: Should contain shared interrupt of the aux block
11 - clocks: The clock feeding the SPI controller - needs to
15 - cs-gpios: the cs-gpios (native cs is NOT supported)
16 see also spi-bus.txt
21 compatible = "brcm,bcm2835-aux-spi";
25 #address-cells = <1>;
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| D | spi-pxa2xx.txt | 1 PXA2xx SSP SPI Controller
4 - compatible: Must be "marvell,mmp2-ssp".
5 - reg: Offset and length of the device's register set.
6 - interrupts: Should be the interrupt number.
7 - clocks: Should contain a single entry describing the clock input.
8 - #address-cells: Number of cells required to define a chip select address.
9 - #size-cells: Should be zero.
12 - cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
13 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - spi-slave: Empty property indicating the SPI controller is used in slave mode.
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-pisosr.txt | 1 Generic Parallel-in/Serial-out Shift Register GPIO Driver
3 This binding describes generic parallel-in/serial-out shift register
5 SN74165 serial-out shift registers and the SN65HVS88x series of
9 - compatible : Should be "pisosr-gpio".
10 - gpio-controller : Marks the device node as a GPIO controller.
11 - #gpio-cells : Should be two. For consumer use see gpio.txt.
14 - ngpios : Number of used GPIO lines (0..n-1), default is 8.
15 - load-gpios : GPIO pin specifier attached to load enable, this
19 For other required and optional properties of SPI slave
20 nodes please refer to ../spi/spi-bus.txt.
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| D | gpio-xra1403.txt | 1 GPIO Driver for XRA1403 16-BIT GPIO Expander With Reset Input from EXAR
3 The XRA1403 is an 16-bit GPIO expander with an SPI interface. Features available:
4 - Individually programmable inputs:
5 - Internal pull-up resistors
6 - Polarity inversion
7 - Individual interrupt enable
8 - Rising edge and/or Falling edge interrupt
9 - Input filter
10 - Individually programmable outputs
11 - Output Level Control
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| D | gpio-max3191x.txt | 1 GPIO driver for Maxim MAX3191x industrial serializer
4 - compatible: Must be one of:
11 - reg: Chip select number.
12 - gpio-controller: Marks the device node as a GPIO controller.
13 - #gpio-cells: Should be two. For consumer use see gpio.txt.
16 - #daisy-chained-devices:
17 Number of chips in the daisy-chain (default is 1).
18 - maxim,modesel-gpios: GPIO pins to configure modesel of each chip.
19 The number of GPIOs must equal "#daisy-chained-devices"
22 - maxim,fault-gpios: GPIO pins to read fault of each chip.
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| D | spear_spics.txt | 1 === ST Microelectronics SPEAr SPI CS Driver ===
4 Cell spi controller through its system registers, which otherwise remains under
7 desired by some of the device protocols above spi which expect (multiple)
13 the control of this interface as gpio.
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
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| /Documentation/devicetree/bindings/net/wireless/ |
| D | ti,wl1251.txt | 3 The wl1251 chip can be connected via SPI or via SDIO. This
4 document describes the binding for the SPI connected chip.
7 - compatible : Should be "ti,wl1251"
8 - reg : Chip select address of device
9 - spi-max-frequency : Maximum SPI clocking speed of device in Hz
10 - interrupts : Should contain interrupt line
11 - vio-supply : phandle to regulator providing VIO
12 - ti,power-gpio : GPIO connected to chip's PMEN pin
15 - ti,wl1251-has-eeprom : boolean, the wl1251 has an eeprom connected, which
17 - Please consult Documentation/devicetree/bindings/spi/spi-bus.txt
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| /Documentation/devicetree/bindings/fpga/ |
| D | lattice-ice40-fpga-mgr.txt | 4 - compatible: Should contain "lattice,ice40-fpga-mgr"
5 - reg: SPI chip select
6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
7 - cdone-gpios: GPIO input connected to CDONE pin
8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
9 that unless the GPIO is held low during startup, the
10 FPGA will enter Master SPI mode and drive SCK with a
16 compatible = "lattice,ice40-fpga-mgr";
18 spi-max-frequency = <1000000>;
19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/net/ieee802154/ |
| D | ca8210.txt | 4 - compatible: Should be "cascoda,ca8210"
5 - reg: Controlling chip select
6 - spi-max-frequency: Maximum clock speed, should be *less than*
8 - spi-cpol: Requires inverted clock polarity
9 - reset-gpio: GPIO attached to reset
10 - irq-gpio: GPIO attached to IRQ
12 - extclock-enable: Include for the ca8210 to route its 16MHz clock
14 - extclock-freq: Frequency in Hz of the external clock
15 - extclock-gpio: GPIO of the ca8210 to output the clock on
21 spi-max-frequency = <3000000>;
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| /Documentation/devicetree/bindings/bus/ |
| D | moxtet.txt | 1 Turris Mox module status and configuration bus (over SPI)
4 - compatible : Should be "cznic,moxtet"
5 - #address-cells : Has to be 1
6 - #size-cells : Has to be 0
7 - spi-cpol : Required inverted clock polarity
8 - spi-cpha : Required shifted clock phase
9 - interrupts : Must contain reference to the shared interrupt line
10 - interrupt-controller : Required
11 - #interrupt-cells : Has to be 1
13 For other required and optional properties of SPI slave nodes please refer to
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| /Documentation/devicetree/bindings/mfd/ |
| D | altera-a10sr.txt | 4 - compatible : "altr,a10sr"
5 - spi-max-frequency : Maximum SPI frequency.
6 - reg : The SPI Chip Select address for the Arria10
8 - interrupts : The interrupt line the device is connected to.
9 - interrupt-controller : Marks the device node as an interrupt controller.
10 - #interrupt-cells : The number of cells to describe an IRQ, should be 2.
13 masks from ../interrupt-controller/interrupts.txt.
15 The A10SR consists of these sub-devices:
18 ------ ----------
19 a10sr_gpio GPIO Controller
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | adi,ad7768-1.txt | 1 Analog Devices AD7768-1 ADC device driver
3 Required properties for the AD7768-1:
5 - compatible: Must be "adi,ad7768-1"
6 - reg: SPI chip select number for the device
7 - spi-max-frequency: Max SPI frequency to use
8 see: Documentation/devicetree/bindings/spi/spi-bus.txt
9 - clocks: phandle to the master clock (mclk)
10 see: Documentation/devicetree/bindings/clock/clock-bindings.txt
11 - clock-names: Must be "mclk".
12 - interrupts: IRQ line for the ADC
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| /Documentation/devicetree/bindings/net/ |
| D | wiznet,w5x00.txt | 3 This is a standalone 10/100 MBit Ethernet controller with SPI interface.
5 For each device connected to a SPI bus, define a child node within
6 the SPI master node.
9 - compatible: Should be one of the following strings:
13 - reg: Specify the SPI chip select the chip is wired to.
14 - interrupts: Specify the interrupt index within the interrupt controller (referred
15 to above in interrupt-parent) and interrupt type. w5x00 natively
18 - pinctrl-names: List of assigned state names, see pinctrl binding documentation.
19 - pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
24 - spi-max-frequency: Maximum frequency of the SPI bus when accessing the w5500.
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | vitesse,vsc73xx.txt | 9 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
10 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
11 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
12 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
16 If SPI interface is used, the device tree node is an SPI device so it must
17 reside inside a SPI bus device tree node, see spi/spi-bus.txt
19 When the chip is connected to a parallel memory bus and work in memory-mapped
25 - compatible: must be exactly one of:
30 - gpio-controller: indicates that this switch is also a GPIO controller,
31 see gpio/gpio.txt
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| /Documentation/devicetree/bindings/sound/ |
| D | cs4271.txt | 3 This driver supports both the I2C and the SPI bus.
7 - compatible: "cirrus,cs4271"
9 For required properties on SPI, please consult
10 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - reg: the i2c address
19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
21 - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
23 - cirrus,enable-soft-reset:
25 line is de-asserted. That also means that clocks cannot be changed
27 a complete re-initialization of all registers.
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| /Documentation/devicetree/bindings/display/ |
| D | sitronix,st7735r.txt | 3 This binding is for display panels using a Sitronix ST7735R controller in SPI
7 - compatible: "jianda,jd-t18003-t01", "sitronix,st7735r"
8 - dc-gpios: Display data/command selection (D/CX)
9 - reset-gpios: Reset signal (RSTX)
11 The node for this driver must be a child node of a SPI controller, hence
12 all mandatory properties described in ../spi/spi-bus.txt must be specified.
15 - rotation: panel rotation in degrees counter clockwise (0,90,180,270)
16 - backlight: phandle of the backlight device attached to the panel
21 compatible = "gpio-backlight";
22 gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
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| D | repaper.txt | 1 Pervasive Displays RePaper branded e-ink displays
4 - compatible: "pervasive,e1144cs021" for 1.44" display
9 - panel-on-gpios: Timing controller power control
10 - discharge-gpios: Discharge control
11 - reset-gpios: RESET pin
12 - busy-gpios: BUSY pin
15 - border-gpios: Border control
17 The node for this driver must be a child node of a SPI controller, hence
18 all mandatory properties described in ../spi/spi-bus.txt must be specified.
21 - pervasive,thermal-zone: name of thermometer's thermal zone
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| /Documentation/devicetree/bindings/misc/ |
| D | olpc,xo1.75-ec.txt | 1 OLPC XO-1.75 Embedded Controller
4 - compatible: Should be "olpc,xo1.75-ec".
5 - cmd-gpios: gpio specifier of the CMD pin
7 The embedded controller requires the SPI controller driver to signal readiness
9 strobing the ACK pin with the ready signal. See the "ready-gpios" property of the
11 <Documentation/devicetree/bindings/spi/spi-pxa2xx.txt>.
15 spi-slave;
16 ready-gpios = <&gpio 125 GPIO_ACTIVE_HIGH>;
19 compatible = "olpc,xo1.75-ec";
20 spi-cpha;
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| /Documentation/devicetree/bindings/net/nfc/ |
| D | st95hf.txt | 3 ST NFC Transceiver is required to attach with SPI bus.
4 ST95HF node should be defined in DT as SPI slave device of SPI
11 - reg: Address of SPI slave "ST95HF transceiver" on SPI master bus.
13 - compatible: should be "st,st95hf" for ST95HF NFC transceiver
15 - spi-max-frequency: Max. operating SPI frequency for ST95HF
18 - enable-gpio: GPIO line to enable ST95HF transceiver.
20 - interrupts : Standard way to define ST95HF transceiver's out
25 - st95hfvin-supply : This is an optional property. It contains a
30 spi@9840000 {
32 #address-cells = <1>;
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| /Documentation/driver-api/gpio/ |
| D | drivers-on-gpio.rst | 2 Subsystem drivers using GPIO
5 Note that standard kernel drivers exist for common GPIO tasks and will provide
6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
14 i.e. a LED will turn on/off in response to a GPIO line going high or low
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
21 GPIO line cannot generate interrupts, so it needs to be periodically polled
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| /Documentation/devicetree/bindings/iio/accel/ |
| D | adi,adxl345.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices ADXL345/ADXL375 3-Axis Digital Accelerometers
10 - Michael Hennerich <michael.hennerich@analog.com>
13 Analog Devices ADXL345/ADXL375 3-Axis Digital Accelerometers that supports
14 both I2C & SPI interfaces.
16 http://www.analog.com/en/products/sensors-mems/accelerometers/adxl375.html
21 - adi,adxl345
22 - adi,adxl375
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| /Documentation/devicetree/bindings/iio/health/ |
| D | afe4403.txt | 4 - compatible : Should be "ti,afe4403".
5 - reg : SPI chip select address of device.
6 - tx-supply : Regulator supply to transmitting LEDs.
7 - interrupts : The interrupt line the device ADC_RDY pin is
9 ../../interrupt-controller/interrupts.txt.
12 - reset-gpios : GPIO used to reset the device.
13 For details refer to, ../../gpio/gpio.txt.
15 For other required and optional properties of SPI slave nodes
16 please refer to ../../spi/spi-bus.txt.
24 spi-max-frequency = <10000000>;
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