Searched +full:spi +full:- +full:rx +full:- +full:delay +full:- +full:us (Results 1 – 4 of 4) sorted by relevance
| /Documentation/devicetree/bindings/input/rmi4/ |
| D | rmi_spi.txt | 1 Synaptics RMI4 SPI Device Binding
5 bindings for devices using the SPI transport driver. Complete documentation
10 - compatible: syna,rmi4-spi
11 - reg: Chip select address for the device
12 - #address-cells: Set to 1 to indicate that the function child nodes
14 - #size-cells: Set to 0 to indicate that the function child nodes do not
18 - interrupts: interrupt which the rmi device is connected to.
19 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - spi-rx-delay-us: microsecond delay after a read transfer.
22 - spi-tx-delay-us: microsecond delay after a write transfer.
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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| /Documentation/networking/ |
| D | pktgen.txt | 4 ------------------------------------
6 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
29 overload type of benchmarking, as this could hurt the normal use-case.
32 # ethtool -G ethX tx 1024
40 TX ring cause delay. Drivers usually delay cleaning up the
41 ring-buffers for various performance reasons, and packets stalling
45 (Intel 82599 chip). This driver (ixgbe) combines TX+RX ring cleanups,
46 and the cleanup interval is affected by the ethtool --coalesce setting
47 of parameter "rx-usecs".
50 # ethtool -C ethX rx-usecs 30
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| /Documentation/networking/dsa/ |
| D | sja1105.rst | 10 - SJA1105E: First generation, no TTEthernet
11 - SJA1105T: First generation, TTEthernet
12 - SJA1105P: Second generation, no TTEthernet, no SGMII
13 - SJA1105Q: Second generation, TTEthernet, no SGMII
14 - SJA1105R: Second generation, no TTEthernet, SGMII
15 - SJA1105S: Second generation, TTEthernet, SGMII
17 These are SPI-managed automotive switches, with all ports being gigabit
21 set-and-forget use, with minimal dynamic interaction at runtime. They
23 with CRC and table headers, and sent over SPI.
56 Also the configuration is write-only (software cannot read it back from the
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