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/Documentation/networking/caif/
Dspi_porting.txt1 - CAIF SPI porting -
3 - CAIF SPI basics:
5 Running CAIF over SPI needs some extra setup, owing to the nature of SPI.
7 between the master and the slave. The minimum requirement for running
8 CAIF over SPI is a SPI slave chip and two GPIOs (more details below).
9 Please note that running as a slave implies that you need to keep up
12 - CAIF SPI framework:
14 To make porting as easy as possible, the CAIF SPI has been divided in
16 generic functionality such as length framing, SPI frame negotiation
17 and SPI frame delivery and transmission. The other part is the CAIF
[all …]
/Documentation/devicetree/bindings/fpga/
Dlattice-machxo2-spi.txt1 Lattice MachXO2 Slave SPI FPGA Manager
4 'slave SPI' interface.
9 - compatible: should contain "lattice,machxo2-slave-spi"
10 - reg: spi chip select of the FPGA
14 fpga-region0 {
15 compatible = "fpga-region";
16 fpga-mgr = <&fpga_mgr_spi>;
17 #address-cells = <0x1>;
18 #size-cells = <0x1>;
21 spi1: spi@2000 {
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Dxilinx-slave-serial.txt1 Xilinx Slave Serial SPI FPGA Manager
3 Xilinx Spartan-6 FPGAs support a method of loading the bitstream over
4 what is referred to as "slave serial" interface.
5 The slave serial link is not technically SPI, and might require extra
6 circuits in order to play nicely with other SPI slaves on the same bus.
11 - compatible: should contain "xlnx,fpga-slave-serial"
12 - reg: spi chip select of the FPGA
13 - prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)
14 - done-gpios: config status pin (referred to as DONE in the manual)
18 fpga-region0 {
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/Documentation/devicetree/bindings/spi/
Dspi-fsl-lpspi.txt1 * Freescale Low Power SPI (LPSPI) for i.MX
4 - compatible :
5 - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc
6 - "fsl,imx8qxp-spi" for LPSPI compatible with the one integrated on i.MX8QXP soc
7 - reg : address and length of the lpspi master registers
8 - interrupt-parent : core interrupt controller
9 - interrupts : lpspi interrupt
10 - clocks : lpspi clock specifier. Its number and order need to correspond to the
11 value in clock-names.
12 - clock-names : Corresponding to per clock and ipg clock in "clocks"
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Dspi-pxa2xx.txt1 PXA2xx SSP SPI Controller
4 - compatible: Must be "marvell,mmp2-ssp".
5 - reg: Offset and length of the device's register set.
6 - interrupts: Should be the interrupt number.
7 - clocks: Should contain a single entry describing the clock input.
8 - #address-cells: Number of cells required to define a chip select address.
9 - #size-cells: Should be zero.
12 - cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
13 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - spi-slave: Empty property indicating the SPI controller is used in slave mode.
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Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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Dspi-slave-mt27xx.txt1 Binding for MTK SPI Slave controller
4 - compatible: should be one of the following.
5 - mediatek,mt2712-spi-slave: for mt2712 platforms
6 - reg: Address and length of the register set for the device.
7 - interrupts: Should contain spi interrupt.
8 - clocks: phandles to input clocks.
10 - clock-names: should be "spi" for the clock gate.
13 - assigned-clocks: it's mux clock, should be <&topckgen CLK_TOP_SPISLV_SEL>.
14 - assigned-clock-parents: parent of mux clock.
16 - <&topckgen CLK_TOP_UNIVPLL1_D2>: specify parent clock 312MHZ.
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Dnvidia,tegra114-spi.txt1 NVIDIA Tegra114 SPI controller.
4 - compatible : For Tegra114, must contain "nvidia,tegra114-spi".
5 Otherwise, must contain '"nvidia,<chip>-spi", "nvidia,tegra114-spi"' where
7 - reg: Should contain SPI registers location and length.
8 - interrupts: Should contain SPI interrupts.
9 - clock-names : Must include the following entries:
10 - spi
11 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries:
14 - spi
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Dqcom,spi-geni-qcom.txt1 GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
3 The QUP v3 core is a GENI based AHB slave that provides a common data path
4 (an output FIFO and an input FIFO) for serial peripheral interface (SPI)
5 mini-core.
7 SPI in master mode supports up to 50MHz, up to four chip selects, programmable
11 - compatible: Must contain "qcom,geni-spi".
12 - reg: Must contain SPI register location and length.
13 - interrupts: Must contain SPI controller interrupts.
14 - clock-names: Must contain "se".
15 - clocks: Serial engine core clock needed by the device.
[all …]
Dspi-davinci.txt1 Davinci SPI controller device bindings
4 Keystone 2 - http://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - http://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
10 address on the SPI bus. Should be set to 1.
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
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Dspi-fsl-dspi.txt4 - compatible : "fsl,vf610-dspi", "fsl,ls1021a-v1.0-dspi",
5 "fsl,ls2085a-dspi"
7 "fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
8 "fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
9 "fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
10 - reg : Offset and length of the register set for the device
11 - interrupts : Should contain SPI controller interrupt
12 - clocks: from common clock binding: handle to dspi clock.
13 - clock-names: from common clock binding: Shall be "dspi".
14 - pinctrl-0: pin control group to be used for this controller.
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Dqcom,spi-qup.txt1 Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
3 The QUP core is an AHB slave that provides a common data path (an output FIFO
4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
6 SPI in master mode supports up to 50MHz, up to four chip selects, programmable
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
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/Documentation/spi/
Dpxa2xx.rst2 PXA2xx SPI on SSP driver HOWTO
6 synchronous serial port into a SPI master controller
7 (see Documentation/spi/spi-summary.rst). The driver has the following features
9 - Support for any PXA2xx SSP
10 - SSP PIO and SSP DMA data transfers.
11 - External and Internal (SSPFRM) chip selects.
12 - Per slave device (chip) configuration.
13 - Full suspend, freeze, resume support.
17 (pump_transfer) is responsible for queuing SPI transactions and setting up and
21 -----------------------------------
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Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
16 Slave Out" (MISO) signals. (Other names are also used.) There are four
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
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/Documentation/devicetree/bindings/misc/
Dolpc,xo1.75-ec.txt1 OLPC XO-1.75 Embedded Controller
4 - compatible: Should be "olpc,xo1.75-ec".
5 - cmd-gpios: gpio specifier of the CMD pin
7 The embedded controller requires the SPI controller driver to signal readiness
9 strobing the ACK pin with the ready signal. See the "ready-gpios" property of the
11 <Documentation/devicetree/bindings/spi/spi-pxa2xx.txt>.
15 spi-slave;
16 ready-gpios = <&gpio 125 GPIO_ACTIVE_HIGH>;
18 slave {
19 compatible = "olpc,xo1.75-ec";
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Dlwn-bk4.txt1 * Liebherr's BK4 controller external SPI
5 The SPI is used for data and management purposes in both master and
6 slave modes.
10 - compatible : Should be "lwn,bk4"
12 Required SPI properties:
14 - reg : Should be address of the device chip select within
17 - spi-max-frequency : Maximum SPI clocking speed of device in Hz, should be
22 spidev0: spi@0 {
24 spi-max-frequency = <30000000>;
/Documentation/devicetree/bindings/net/
Dqca,qca7000.txt3 The QCA7000 is a serial-to-powerline bridge with a host interface which could
4 be configured either as SPI or UART slave. This configuration is done by
7 (a) Ethernet over SPI
9 In order to use the QCA7000 as SPI device it must be defined as a child of a
10 SPI master in the device tree.
13 - compatible : Should be "qca,qca7000"
14 - reg : Should specify the SPI chip select
15 - interrupts : The first cell should specify the index of the source
18 - spi-cpha : Must be set
19 - spi-cpol : Must be set
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/Documentation/devicetree/bindings/input/touchscreen/
Dad7879.txt1 * Analog Devices AD7879(-1)/AD7889(-1) touchscreen interface (SPI/I2C)
4 - compatible : for SPI slave, use "adi,ad7879"
5 for I2C slave, use "adi,ad7879-1"
6 - reg : SPI chipselect/I2C slave address
7 See spi-bus.txt for more SPI slave properties
8 - interrupts : touch controller interrupt
9 - touchscreen-max-pressure : maximum reported pressure
10 - adi,resistance-plate-x : total resistance of X-plate (for pressure
13 - touchscreen-swapped-x-y : X and Y axis are swapped (boolean)
14 - adi,first-conversion-delay : 0-12: In 128us steps (starting with 128us)
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/Documentation/devicetree/bindings/net/nfc/
Dst95hf.txt3 ST NFC Transceiver is required to attach with SPI bus.
4 ST95HF node should be defined in DT as SPI slave device of SPI
11 - reg: Address of SPI slave "ST95HF transceiver" on SPI master bus.
13 - compatible: should be "st,st95hf" for ST95HF NFC transceiver
15 - spi-max-frequency: Max. operating SPI frequency for ST95HF
18 - enable-gpio: GPIO line to enable ST95HF transceiver.
20 - interrupts : Standard way to define ST95HF transceiver's out
25 - st95hfvin-supply : This is an optional property. It contains a
30 spi@9840000 {
32 #address-cells = <1>;
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/Documentation/driver-api/
Dspi.rst1 Serial Peripheral Interface (SPI)
4 SPI is the "Serial Peripheral Interface", widely used with embedded
7 often in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
8 line, and a "Master In, Slave Out" (MISO) data line. SPI is a full
12 additional chipselect line is usually active-low (nCS); four signals are
15 The SPI bus facilities listed here provide a generalized interface to
16 declare SPI busses and devices, manage them according to the standard
18 only "master" side interfaces are supported, where Linux talks to SPI
20 to support implementing SPI slaves would necessarily look different.)
26 SPI shift register (maximizing throughput). Such drivers bridge between
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/Documentation/devicetree/bindings/iio/temperature/
Dmaxim_thermocouple.txt8 - compatible: must be "maxim,max31855" or "maxim,max6675"
9 - reg: SPI chip select number for the device
10 - spi-max-frequency: must be 4300000
11 - spi-cpha: must be defined for max6675 to enable SPI mode 1
13 Refer to spi/spi-bus.txt for generic SPI slave bindings.
20 spi-max-frequency = <4300000>;
Dmax31856.txt6 - thermocouple-type: Type of thermocouple (THERMOCOUPLE_TYPE_K if
10 - compatible: must be "maxim,max31856"
11 - reg: SPI chip select number for the device
12 - spi-max-frequency: As per datasheet max. supported freq is 5000000
13 - spi-cpha: must be defined for max31856 to enable SPI mode 1
15 Refer to spi/spi-bus.txt for generic SPI slave bindings.
18 temp-sensor@0 {
21 spi-max-frequency = <5000000>;
22 spi-cpha;
23 thermocouple-type = <THERMOCOUPLE_TYPE_K>;
/Documentation/devicetree/bindings/display/panel/
Dlg,lg4573.txt1 LG LG4573 TFT Liquid Crystal Display with SPI control bus
4 - compatible: "lg,lg4573"
5 - reg: address of the panel on the SPI bus
7 The panel must obey rules for SPI slave device specified in document [1].
9 [1]: Documentation/devicetree/bindings/spi/spi-bus.txt
14 #address-cells = <1>;
15 #size-cells = <1>;
17 spi-max-frequency = <10000000>;
/Documentation/devicetree/bindings/rtc/
Dnxp,rtc-2123.txt1 NXP PCF2123 SPI Real Time Clock
4 - compatible: should be: "nxp,pcf2123"
6 - reg: should be the SPI slave chipselect address
9 - spi-cs-high: PCF2123 needs chipselect high
16 spi-cs-high;

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