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/Documentation/devicetree/bindings/watchdog/
Dalphascale-asm9260.txt5 - compatible : should be "alphascale,asm9260-wdt".
6 - reg : Specifies base physical address and size of the registers.
7 - clocks : the clocks feeding the watchdog timer. See clock-bindings.txt
8 - clock-names : should be set to
9 "mod" - source for tick counter.
10 "ahb" - ahb gate.
11 - resets : phandle pointing to the system reset controller with
13 - reset-names : should be set to "wdt_rst".
16 - timeout-sec : shall contain the default watchdog timeout in seconds,
18 - alphascale,mode : three modes are supported
[all …]
/Documentation/devicetree/bindings/ata/
Dahci-mtk.txt4 - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci".
5 When using "mediatek,mtk-ahci" compatible strings, you
7 - "mediatek,mt7622-ahci"
8 - reg : Physical base addresses and length of register sets.
9 - interrupts : Interrupt associated with the SATA device.
10 - interrupt-names : Associated name must be: "hostc".
11 - clocks : A list of phandle and clock specifier pairs, one for each
12 entry in clock-names.
13 - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm".
14 - phys : A phandle and PHY specifier pair for the PHY port.
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/Documentation/ABI/testing/
Dsysfs-driver-hid-corsair5 Description: Get/set the current playback mode. "SW" for software mode
6 where G-keys triggers their regular key codes. "HW" for
7 hardware playback mode where the G-keys play their macro
8 from the on-board memory.
Dsysfs-bus-coresight-devices-etm4x76 Description: (R) Indicates the number of single-shot comparator controls that
86 What: /sys/bus/coresight/devices/<memory_map>.etm/mode
155 Description: (RW) In non-secure state, each bit controls whether instruction
310 Description: (R) Print the content of the SW Lock Status Register
367 (0x010) as currently set by SW.
431 Description: (R) Returns the number of P0 right-hand keys that the trace unit
438 Description: (R) Returns the number of P1 right-hand keys that the trace unit
445 Description: (R) Returns the number of special P1 right-hand keys that the
453 Description: (R) Returns the number of conditional P1 right-hand keys that
461 Description: (R) Returns the number of special conditional P1 right-hand keys
/Documentation/devicetree/bindings/phy/
Dphy-miphy28lp.txt8 - compatible : Should be "st,miphy28lp-phy".
9 - st,syscfg : Should be a phandle of the system configuration register group
10 which contain the SATA, PCIe or USB3 mode setting bits.
12 Required nodes : A sub-node is required for each channel the controller
14 'reg' and 'reg-names' properties are used inside these
19 - #phy-cells : Should be 1 (See second example)
21 - PHY_TYPE_SATA
22 - PHY_TYPE_PCI
23 - PHY_TYPE_USB3
24 - reg : Address and length of the register set for the device.
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/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Beniamin Bia <beniamin.bia@analog.com>
11 - Stefan Popa <stefan.popa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-8
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Dst,stm32-adc.txt3 STM32 ADC is a successive approximation analog-to-digital converter.
5 in single, continuous, scan or discontinuous mode. Result of the ADC is
6 stored in a left-aligned or right-aligned 32-bit data register.
10 voltage goes beyond the user-defined, higher or lower thresholds.
16 - regular conversion can be done in sequence, running in background
17 - injected conversions have higher priority, and so have the ability to
18 interrupt regular conversion sequence (either triggered in SW or HW).
22 -----------------------------------
24 - compatible: Should be one of:
25 "st,stm32f4-adc-core"
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/Documentation/devicetree/bindings/usb/
Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: should contain "ref", "bus_early", "suspend"
11 - clocks: list of phandle and clock specifier pairs corresponding to
12 entries in the clock-names property.
15 clocks are optional if the parent node (i.e. glue-layer) is compatible to
17 "amlogic,meson-axg-dwc3"
18 "amlogic,meson-gxl-dwc3"
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Domap-usb.txt4 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
5 - ti,hwmods : must be "usb_otg_hs"
6 - multipoint : Should be "1" indicating the musb controller supports
7 multipoint. This is a MUSB configuration-specific setting.
8 - num-eps : Specifies the number of endpoints. This is also a
9 MUSB configuration-specific setting. Should be set to "16"
10 - ram-bits : Specifies the ram address size. Should be set to "12"
11 - interface-type : This is a board specific setting to describe the type of
14 - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
16 - power : Should be "50". This signifies the controller can supply up to
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/Documentation/networking/device_drivers/intel/
Dipw2200.txt13 Copyright (C) 2004-2006, Intel Corporation
22 -----------------------------------------------
30 2. Ad-Hoc Networking
32 3.1. iwconfig mode
41 -----------------------------------------------
71 the warranty and/or issues arising from regulatory non-compliance, and
76 modules, and accordingly, condition system-level regulatory approval
79 non-compliant.
92 -----------------------------------------------
105 -----------------------------------------------
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Dipw2100.txt6 Copyright (C) 2003-2006, Intel Corporation
10 Version: git-1.1.5
14 -----------------------------------------------
17 2. Release git-1.1.5 Current Features
28 -----------------------------------------------
58 the warranty and/or issues arising from regulatory non-compliance, and
63 modules, and accordingly, condition system-level regulatory approval
66 non-compliant.
75 http://www.intel.com/support/wireless/sb/CS-006408.htm
78 -----------------------------------------------
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/Documentation/devicetree/bindings/mfd/
Daxp20x.txt4 axp152 (X-Powers)
5 axp202 (X-Powers)
6 axp209 (X-Powers)
7 axp221 (X-Powers)
8 axp223 (X-Powers)
9 axp803 (X-Powers)
10 axp806 (X-Powers)
11 axp809 (X-Powers)
12 axp813 (X-Powers)
20 - compatible: should be one of:
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Dmax77620.txt4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
[all …]
/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.txt4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
14 "nvidia,tegra20-i2c-dvc".
15 nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support
16 master and slave mode of I2C communication. The i2c-tegra driver only
17 support master mode of I2C communication. Driver of I2C controller is
[all …]
/Documentation/input/devices/
Dalps.rst1 ----------------------
3 ----------------------
6 ------------
10 Since roughly mid-2010 several new ALPS touchpads have been released and
14 adequate. The design choices were to re-define the alps_model_data
29 ---------
32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
37 report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
41 model signature is always 73-02-64. To differentiate between these
[all …]
/Documentation/networking/
Dpktgen.txt4 ------------------------------------
6 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
15 root 129 0.3 0.0 0 0 ? SW 2003 523:20 [kpktgend_0]
16 root 130 0.3 0.0 0 0 ? SW 2003 509:50 [kpktgend_1]
29 overload type of benchmarking, as this could hurt the normal use-case.
32 # ethtool -G ethX tx 1024
41 ring-buffers for various performance reasons, and packets stalling
46 and the cleanup interval is affected by the ethtool --coalesce setting
47 of parameter "rx-usecs".
50 # ethtool -C ethX rx-usecs 30
[all …]
Dxfrm_device.txt3 XFRM device - offloading the IPsec computations
24 ip x s add proto esp dst 14.0.0.70 src 14.0.0.52 spi 0x07 mode transport \
25 reqid 0x07 replay-window 32 \
61 adapter->netdev->xfrmdev_ops = &ixgbe_xfrmdev_ops;
62 adapter->netdev->features |= NETIF_F_HW_ESP;
63 adapter->netdev->hw_enc_features |= NETIF_F_HW_ESP;
68 - verify the algorithm is supported for offloads
69 - store the SA information (key, salt, target-ip, protocol, etc)
70 - enable the HW offload of the SA
71 - return status value:
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/Documentation/devicetree/bindings/mtd/
Dgpmc-nand.txt7 explained in a separate documents - please refer to
8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
11 Documentation/devicetree/bindings/mtd/nand-controller.yaml
16 - compatible: "ti,omap2-nand"
17 - reg: range id (CS number), base offset and length of the
19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount.
23 - nand-bus-width: Set this numeric value to 16 if the hardware
27 - ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
28 "sw" 1-bit Hamming ecc code via software
30 "hw-romcode" <deprecated> use "ham1" instead
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/Documentation/media/v4l-drivers/
Dvivid.rst1 .. SPDX-License-Identifier: GPL-2.0
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
29 - Support for various pixel aspect ratios and video aspect ratios
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/Documentation/devicetree/bindings/net/
Dsnps,dwc-qos-ethernet.txt13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
22 - reg: Address and length of the register set for the device
23 - clocks: Phandle and clock specifiers for each entry in clock-names, in the
24 same order. See ../clock/clock-bindings.txt.
25 - clock-names: May contain any/all of the following depending on the IP
[all …]
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
[all …]
/Documentation/networking/device_drivers/stmicro/
Dstmmac.txt3 Copyright (C) 2007-2015 STMicroelectronics Ltd
6 This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers
22 Device Drivers ---> Network device support ---> Ethernet (1000 Mbit) --->
37 chain_mode: select chain mode instead of ring.
50 net_device structure, enabling the scatter-gather feature. This is true on
62 The incoming packets are stored, by the DMA, in a list of pre-allocated socket
63 buffers in order to avoid the memcpy (zero-copy).
68 New chips have an HW RX-Watchdog used for this mitigation.
80 and linked-list(CHAINED) mode. In RING each descriptor points to two
81 data buffer pointers whereas in CHAINED mode they point to only one data
[all …]
/Documentation/devicetree/bindings/pci/
Dnvidia,tegra194-pcie.txt4 and thus inherits all the common properties defined in designware-pcie.txt.
7 - compatible: For Tegra19x, must contain "nvidia,tegra194-pcie".
8 - device_type: Must be "pci"
9 - power-domains: A phandle to the node that controls power to the respective
19 "include/dt-bindings/power/tegra194-powergate.h" file.
20 - reg: A list of physical base address and length pairs for each set of
21 controller registers. Must contain an entry for each entry in the reg-names
23 - reg-names: Must include the following entries:
25 "config": As per the definition in designware-pcie.txt
28 for SW access.
[all …]
/Documentation/riscv/
Dpmu.rst2 Supporting PMUs on RISC-V platforms
8 ------------
10 As of this writing, perf_event-related features mentioned in The RISC-V ISA
23 Counters are just free-running all the time in our case.
33 hardware-extension for M-S-U model machines to write counters directly.
44 -----------------
47 various methods according to perf's internal convention and PMU-specific
53 the minimal and already-implemented logic can be leveraged, or invent his/her
63 -----------------------
72 into bitmap, so that HW-related control registers or counters can directly be
[all …]
/Documentation/dev-tools/
Dkgdb.rst15 Kdb is simplistic shell-style interface which you can use on a system
22 kernel built-ins or in kernel modules if the code was built with
40 kgdb I/O modules compiled as built-ins or loadable kernel modules in the
46 - In order to enable compilation of kdb, you must first enable kgdb.
48 - The kgdb test compile options are described in the kgdb test suite
52 ------------------------------
55 :menuselection:`Kernel hacking --> Kernel debugging` and select
74 certain regions of the kernel's memory space as read-only. If kgdb
94 -----------------------------
109 If you want to use a PS/2-style keyboard with kdb, you would select
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