Searched +full:system +full:- +full:on +full:- +full:chip (Results 1 – 25 of 212) sorted by relevance
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| /Documentation/hwmon/ |
| D | max16065.rst | 11 Addresses scanned: -
15 http://datasheets.maxim-ic.com/en/ds/MAX16065-MAX16066.pdf
21 Addresses scanned: -
25 http://datasheets.maxim-ic.com/en/ds/MAX16067.pdf
31 Addresses scanned: -
35 http://datasheets.maxim-ic.com/en/ds/MAX16068.pdf
41 Addresses scanned: -
45 http://datasheets.maxim-ic.com/en/ds/MAX16070-MAX16071.pdf
47 Author: Guenter Roeck <linux@roeck-us.net>
51 -----------
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| D | adm1025.rst | 10 Addresses scanned: I2C 0x2c - 0x2e
18 Addresses scanned: I2C 0x2c - 0x2d
24 * Only two possible addresses (0x2c - 0x2d).
29 - Chen-Yuan Wu <gwu@esoft.com>,
30 - Jean Delvare <jdelvare@suse.de>
33 -----------
35 (This is from Analog Devices.) The ADM1025 is a complete system hardware
36 monitor for microprocessor-based systems, providing measurement and limit
37 comparison of various system parameters. Five voltage measurement inputs
39 the processor core voltage. The ADM1025 can monitor a sixth power-supply
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| D | wm831x.rst | 1 Kernel driver wm831x-hwmon
11 - http://www.wolfsonmicro.com/products/WM8310
12 - http://www.wolfsonmicro.com/products/WM8311
13 - http://www.wolfsonmicro.com/products/WM8312
18 -----------
21 monitor a range of system operating parameters, including the voltages
22 of the major supplies within the system. Currently the driver provides
26 ------------------
32 ----------------------
34 Temperatures are sampled by a 12 bit ADC. Chip and battery temperatures
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| D | adt7462.rst | 17 -----------
19 This driver implements support for the Analog Devices ADT7462 chip family.
21 This chip is a bit of a beast. It has 8 counters for measuring fan speed. It
23 two. See the chip documentation for more details about the exact set of
24 configurations. This driver does not allow one to configure the chip; that is
25 left to the system designer.
27 A sophisticated control system for the PWM outputs is designed into the ADT7462
28 that allows fan speed to be adjusted automatically based on any of the three
43 ----------------
45 The ADT7462 have a 10-bit ADC and can therefore measure temperatures
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| D | pc87427.rst | 16 Thanks to Amir Habibi at Candelis for setting up a test system, and to
21 -----------
23 The National Semiconductor Super I/O chip includes complete hardware
28 This chip also has fan controlling features (up to 4 PWM outputs),
31 The driver assumes that no more than one chip is present, which seems
36 --------------
38 Fan rotation speeds are reported as 14-bit values from a gated clock
47 -----------------
50 always off, always on, manual and automatic. The latter isn't supported
56 ----------------------
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| D | adt7475.rst | 12 Datasheet: Publicly available at the On Semiconductors website
20 Datasheet: Publicly available at the On Semiconductors website
28 Datasheet: Publicly available at the On Semiconductors website
36 Datasheet: Publicly available at the On Semiconductors website
39 - Jordan Crouse
40 - Hans de Goede
41 - Darrick J. Wong (documentation)
42 - Jean Delvare
46 -----------
49 ADT7476 and ADT7490 chip family. The ADT7473 and ADT7475 differ only in
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| /Documentation/devicetree/bindings/watchdog/ |
| D | aspeed-wdt.txt | 4 - compatible: must be one of:
5 - "aspeed,ast2400-wdt"
6 - "aspeed,ast2500-wdt"
7 - "aspeed,ast2600-wdt"
9 - reg: physical base address of the controller and length of memory mapped
14 - aspeed,reset-type = "cpu|soc|system|none"
16 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
20 This is useful in situations where another watchdog engine on chip is
23 If 'aspeed,reset-type=' is not specfied the default is to enable system
28 - cpu: Reset CPU on watchdog timeout
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| /Documentation/devicetree/bindings/powerpc/4xx/ |
| D | reboot.txt | 1 Reboot property to control system reboot on PPC4xx systems:
7 1 - PPC4xx core reset
8 2 - PPC4xx chip reset
9 3 - PPC4xx system reset (default)
17 reset-type = <2>; /* Use chip-reset */
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| /Documentation/devicetree/bindings/arm/ |
| D | atmel-sysregs.txt | 1 Atmel system registers
4 - compatible: Should be "atmel,sama5d2-chipid"
5 - reg : Should contain registers location and length
8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
11 shared across all System Controller members.
13 System Timer (ST) required properties:
14 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
15 - reg: Should contain registers location and length
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| D | syna.txt | 3 According to https://www.synaptics.com/company/news/conexant-marvell
7 ---------------------------------------------------------------
19 ---------------------------------------------------------------
34 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
36 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
42 model = "Sony NSZ-GS7";
43 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
50 CPU control register allows various operations on CPUs, like resetting them
54 - compatible: should be "marvell,berlin-cpu-ctrl"
55 - reg: address and length of the register set
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pmc.txt | 4 - compatible: "fsl,<chip>-pmc".
6 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
7 compatible. "fsl,mpc8313-pmc" should also be listed for any chip
8 whose PMC is compatible, and implies deep-sleep capability.
10 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
11 compatible. "fsl,mpc8536-pmc" should also be listed for any chip
12 whose PMC is compatible, and implies deep-sleep capability.
14 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
15 compatible; all statements below that apply to "fsl,mpc8548-pmc" also
16 apply to "fsl,mpc8641d-pmc".
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| /Documentation/driver-api/ |
| D | sm501.rst | 9 The Silicon Motion SM501 multimedia companion chip is a multifunction device
15 ----
23 chips via the platform device and driver system.
25 On detection of a device, the core initialises the chip (which may
29 The core re-uses the platform device system as the platform device
30 system provides enough features to support the drivers without the
31 need to create a new bus-type and the associated code to go with it.
35 ---------
43 as this is by-far the most resource-sensitive of the on-chip functions.
59 -------------
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| /Documentation/devicetree/bindings/mtd/ |
| D | jedec,spi-nor.txt | 4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : May include a device-specific string consisting of the
7 manufacturer and name of the chip. A list of supported chip
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
12 Supported chip names:
50 The following chip names have been used historically to
53 m25p05-nonjedec
54 m25p10-nonjedec
55 m25p20-nonjedec
56 m25p40-nonjedec
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| /Documentation/devicetree/bindings/devfreq/event/ |
| D | exynos-nocp.txt | 2 * Samsung Exynos NoC (Network on Chip) Probe device
4 The Samsung Exynos542x SoC has NoC (Network on Chip) Probe for NoC bus.
6 that the Network on Chip (NoC) probes detects are transported over
8 capture packets with header or data on the data request response network,
11 that you can use while analyzing system performance.
14 - compatible: Should be "samsung,exynos5420-nocp"
15 - reg: physical base address of each NoC Probe and length of memory mapped region.
18 - clock-names : the name of clock used by the NoC Probe, "nocp"
19 - clocks : phandles for clock specified in "clock-names" property
24 compatible = "samsung,exynos5420-nocp";
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| /Documentation/scsi/ |
| D | 53c700.txt | 4 This driver supports the 53c700 and 53c700-66 chips. It also supports
6 does sync (-66 and 710 only), disconnects and tag command queueing.
23 define if the chipset must be supported in little endian mode on a big
24 endian architecture (used for the 700 on parisc).
27 Using the Chip Core Driver
30 In order to plumb the 53c700 chip core driver into a working SCSI
31 driver, you need to know three things about the way the chip is wired
32 into your system (or expansion card).
39 the SCSI Id from the card bios or whether the chip is wired for
44 operating system.
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| /Documentation/networking/ |
| D | iphase.txt | 3 ATM (i)Chip IA Linux Driver Source
4 --------------------------------------------------------------------------------
6 --------------------------------------------------------------------------------
9 -----------
11 This is the README file for the Interphase PCI ATM (i)Chip IA Linux driver
15 - A single VPI (VPI value of 0) is supported.
16 - Supports 4K VCs for the server board (with 512K control memory) and 1K
18 - UBR, ABR and CBR service categories are supported.
19 - Only AAL5 is supported.
20 - Supports setting of PCR on the VCs.
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| /Documentation/driver-api/gpio/ |
| D | drivers-on-gpio.rst | 6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
14 i.e. a LED will turn on/off in response to a GPIO line going high or low
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
32 - extcon-gpio: drivers/extcon/extcon-gpio.c is used when you need to read an
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| /Documentation/devicetree/bindings/net/ |
| D | marvell-bt-8xxx.txt | 2 ------
3 The 8997 devices supports multiple interfaces. When used on SDIO interfaces,
4 the btmrvl driver is used and when used on USB interface, the btusb driver is
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
16 - marvell,cal-data: Calibration data downloaded to the device during
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
21 firmware will use the pin to wakeup host system (u16).
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
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| /Documentation/devicetree/bindings/bus/ |
| D | uniphier-system-bus.txt | 1 UniPhier System Bus
3 The UniPhier System Bus is an external bus that connects on-board devices to
4 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
5 some control signals. It supports up to 8 banks (chip selects).
9 within each bank to the CPU-viewed address. The needed setup includes the base
14 - compatible: should be "socionext,uniphier-system-bus".
15 - reg: offset and length of the register set for the bus controller device.
16 - #address-cells: should be 2. The first cell is the bank number (chip select).
18 - #size-cells: should be 1.
19 - ranges: should provide a proper address translation from the System Bus to
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| /Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12057.txt | 1 Intersil ISL12057 I2C RTC/Alarm chip
8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
38 that the pinctrl-related properties below are given for completeness and
39 may not be required or may be different depending on your system or
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| /Documentation/sound/soc/ |
| D | overview.rst | 5 The overall project goal of the ALSA System on Chip (ASoC) layer is to
6 provide better ALSA support for embedded system-on-chip processors (e.g.
9 had some limitations:-
12 CPU. This is not ideal and leads to code duplication - for example,
17 event). These are quite common events on portable devices and often require
18 machine specific code to re-route audio, enable amps, etc., after such an
23 power on portable devices. There was also no support for saving
31 features :-
33 * Codec independence. Allows reuse of codec drivers on other platforms
43 internal power blocks depending on the internal codec audio routing and any
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| /Documentation/devicetree/bindings/mfd/ |
| D | twl4030-power.txt | 5 binding only supports the complete shutdown of the system after poweroff.
8 - compatible : must be one of the following
9 "ti,twl4030-power"
10 "ti,twl4030-power-reset"
11 "ti,twl4030-power-idle"
12 "ti,twl4030-power-idle-osc-off"
14 The use of ti,twl4030-power-reset is recommended at least on
17 When using ti,twl4030-power-idle, the TI recommended configuration
20 When using ti,twl4030-power-idle-osc-off, the TI recommended
22 down during off-idle. Note that this does not work on all boards
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| /Documentation/power/regulator/ |
| D | design.rst | 9 ------
11 - Errors in regulator configuration can have very serious consequences
12 for the system, potentially including lasting hardware damage.
13 - It is not possible to automatically determine the power configuration
14 of the system - software-equivalent variants of the same chip may
21 specific knowledge that these changes are safe to perform on this
22 particular system.
25 ------------------
27 - The overwhelming majority of devices in a system will have no
29 being able to turn it on or off.
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
4 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
19 the analog chip address where user want to access by hardware components.
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
22 one system is reading/writing data by ADI software channels, that should be under
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-soc | 5 The /sys/devices/ directory contains a sub-directory for each
6 System-on-Chip (SoC) device on a running platform. Information
19 Read-only attribute common to all SoCs. Contains the SoC machine
26 Read-only attribute common to all SoCs. Contains SoC family name
33 Read-only attribute supported by most SoCs. Contains the SoC's
40 Read-only attribute supported by most SoCs. In the case of
41 ST-Ericsson's chips this contains the SoC serial number.
47 Read-only attribute supported by most SoCs. Contains the SoC's
54 Read-only attribute supported ST-Ericsson's silicon. Contains the
55 the process by which the silicon chip was manufactured.
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