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| /Documentation/devicetree/bindings/mux/ |
| D | adi,adg792a.txt | 5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
27 * Three independent mux controllers (of which one is used).
53 * Three parallel muxes with one mux controller, useful e.g. if
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| /Documentation/hwmon/ |
| D | emc1403.rst | 57 (one internal, one external). EMC14x3 support three sensors (one internal,
58 two external), and EMC14x4 support four sensors (one internal, three
61 The chips implement three limits for each sensor: low (tempX_min), high
66 all three limits.
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| D | emc6w201.rst | 27 multiple DC fans using three Pulse Width Modulator (PWM) outputs. Note
28 that it is possible to control more than three fans by connecting two
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| D | lm78.rst | 37 There is almost no difference between the three supported chips. Functionally,
40 From here on, LM7* means either of these three types.
42 The LM7* implements one temperature sensor, three fan rotation speed sensors,
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| D | max6697.rst | 76 thermal transitors, except for MAX6698 which supports three diode-connected
77 thermal transistors plus three thermistors in addition to the local temperature
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| D | lm85.rst | 93 specification. Using an analog to digital converter it measures three (3)
96 VID signals from the processor to the VRM. Lastly, there are three (3) PWM
112 three temperature sensors. Each PWM output is individually adjustable and
212 Each temperature sensor is associated with a Zone. There are three
213 sensors and therefore three zones (# 1, 2 and 3). Each zone has the following
228 There are three PWM outputs. The LM85 datasheet suggests that the
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| /Documentation/ABI/testing/ |
| D | sysfs-class-backlight-adp5520 | 4 The backlight brightness control operates at three different levels for the
16 is at one of the three levels (daylight, office or dark). This
29 one of the three levels (daylight, office or dark). This is an
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| D | sysfs-class-backlight-adp8860 | 4 The backlight brightness control operates at three different levels for the
38 is at one of the three levels (daylight, office or dark). This
52 one of the three levels (daylight, office or dark). This is an
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| /Documentation/scheduler/ |
| D | sched-stats.rst | 22 are no architectures which need more than three domain levels. The first
45 Next three are schedule() statistics:
57 Next three are statistics describing scheduling latency:
126 Next three are active_load_balance() statistics:
132 Next three are sched_balance_exec() statistics:
138 Next three are sched_balance_fork() statistics:
144 Next three are try_to_wake_up() statistics:
155 the same information on a per-process level. There are three fields in
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| /Documentation/media/uapi/v4l/ |
| D | colorspaces.rst | 17 biology. Just because you have three numbers that describe the 'red',
27 the human eye has color receptors that are sensitive to three different
28 wavelengths of light. Hence the need to use three numbers to describe
40 Since the human eye has only three color receptors it is perfectly
74 A monitor or TV will reproduce colors by emitting light at three
85 to define the three color primaries (these are typically defined as x, y
87 reference: that is the color obtained when all three primaries are at
93 Other colorspaces are defined by three chromaticity coordinates defined
151 The colorspace definition itself consists of the three chromaticity
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | riscv,cpu-intc.txt | 10 The RISC-V supervisor ISA manual specifies three interrupt sources that are
19 required to have a HLIC with these three interrupt sources present. Since the
29 RISC-V supervisor ISA manual, with only the following three interrupts being
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| /Documentation/devicetree/bindings/phy/ |
| D | phy-mapphone-mdm6600.txt | 10 - motorola,cmd-gpios Three GPIOs to control the power state of the MDM6600
11 - motorola,status-gpios Three GPIOs to read the power state of the MDM6600
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | brcm,dpfe-cpu.txt | 7 There are three memory regions for interacting with the DCPU. These are
13 - reg: must reference three register ranges
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| /Documentation/devicetree/bindings/clock/ |
| D | renesas,r8a7740-cpg-clocks.txt | 5 The CPG generates core clocks for the R8A7740 SoC. It includes three PLLs
14 - clocks: Reference to the three parent clocks
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| /Documentation/devicetree/bindings/dma/ |
| D | atmel-dma.txt | 20 described in the dma.txt file, using a three-cell specifier for each channel:
22 The three cells in order are:
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| /Documentation/devicetree/bindings/net/ |
| D | xilinx_gmii2rgmii.txt | 7 This core can be used in all three modes of operation(10/100/1000 Mb/s).
9 Speed of operation. This core can switch dynamically between the three
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | adpll.txt | 6 register-mapped ADPLL with two to three selectable input clocks
7 and three to four children.
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| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-pxa-pci-ce4100.txt | 5 PCI device has three PCI-bars, each bar contains a complete I2C
6 controller. So we have a total of three independent I2C-Controllers
43 * three is the bar number followed by the 64bit bar address
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra124-dpaux-padctl.txt | 20 Since only three configurations are possible, only three child nodes are
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-max77650.txt | 9 This device has three current sinks.
18 three sub-nodes can be defined.
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| /Documentation/devicetree/bindings/thermal/ |
| D | dove-thermal.txt | 10 three Thermal Manager registers, while the second range contains the
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| /Documentation/media/v4l-drivers/ |
| D | cafe_ccic.rst | 47 - n_dma_bufs: The controller can cycle through either two or three DMA
48 buffers. Normally, the driver tries to use three buffers; on faster
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | lan9303.txt | 1 SMSC/MicroChip LAN9303 three port ethernet switch
21 Note: always use 'reg = <0/1/2>;' for the three DSA ports, even if the device is
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| /Documentation/devicetree/bindings/xillybus/ |
| D | xillybus.txt | 6 - interrupts: Contains one interrupt node, typically consisting of three cells.
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| /Documentation/devicetree/bindings/timer/ |
| D | nuvoton,npcm7xx-timer.txt | 3 Nuvoton NPCM7xx have three timer modules, each timer module provides five 24-bit
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