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/Documentation/driver-api/md/
Draid5-cache.rst7 caches data to the RAID disks. The cache can be in write-through (supported
11 in write-through mode. A user can switch it to write-back mode by::
15 And switch it back to write-through mode by::
17 echo "write-through" > /sys/block/md0/md/journal_mode
22 write-through mode
34 The write-through cache will cache all data on cache disk first. After the data
39 In write-through mode, MD reports IO completion to upper layer (usually
44 In write-through mode, the cache disk isn't required to be big. Several
80 The write-through and write-back cache use the same disk format. The cache disk
91 write-through mode, MD calculates parity for IO data, writes both IO data and
/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Dusb.txt11 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
12 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
15 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
16 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
Ducc.txt24 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
25 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
28 "brg1" through "brg16": clock source is BRG1-BRG16, respectively
29 "clk1" through "clk24": clock source is CLK1-CLK24, respectively
/Documentation/media/v4l-drivers/
Dpvrusb2.rst84 interfaces tie into the driver through this module. This module
86 and is designed to allow concurrent access through multiple
88 the tuner's frequency through sysfs while simultaneously streaming
89 video through V4L out to an instance of mplayer).
109 (proxy through USB instead of PCI) are enough different that this
116 access to the driver should be through one of the high level
123 will work through here.
151 kernel-friendly I2C adaptor driver, through which other external
154 through here that other V4L modules can reach into this driver to
158 through one of the high level interfaces).
[all …]
Dfimc.rst13 data from LCD controller (FIMD) through the SoC internal writeback data
75 data from the sensor through more than one FIMC instance (e.g. for simultaneous
79 through media entity and links enumeration.
109 In order to enable more precise camera pipeline control through the sub-device
116 When we configure these devices through sub-device API at user space, the
152 You can either grep through the kernel log to find relevant information, i.e.
/Documentation/filesystems/
Dfuse-io.txt5 + write-through
19 write-through mode is the default and is supported on all kernels. The
23 In write-through mode each write is immediately sent to userspace as one or more
33 assumes that all changes to the filesystem go through the FUSE kernel module
Ddax.txt43 a large amount of memory through a smaller window, then you cannot
74 exposure of uninitialized data through mmap.
89 writing the affected sectors (through the pmem driver, and if the underlying
92 Since DAX IO normally doesn't go through the driver/bio path, applications or
99 happens through the driver, and will clear bad sectors.
108 provided at the block layer through DM, or additionally, at the filesystem
110 can happen either by sending an IO through the driver, or zeroing (also through
/Documentation/devicetree/bindings/ata/
Dfaraday,ftide010.txt5 platform. The controller can do PIO modes 0 through 4, Multi-word DMA
6 (MWDM)modes 0 through 2 and Ultra DMA modes 0 through 6.
/Documentation/devicetree/bindings/fpga/
Daltera-freeze-bridge.txt5 changes from passing through the bridge. The controller can also
6 unfreeze/enable the bridges which allows traffic to pass through the
Dxilinx-pr-decoupler.txt6 changes from passing through the bridge. The controller can also
7 couple / enable the bridges which allows traffic to pass through the
/Documentation/devicetree/bindings/gpio/
Dspear_spics.txt4 Cell spi controller through its system registers, which otherwise remains under
11 provides another interface through system registers through which software can
/Documentation/devicetree/bindings/media/i2c/
Dsony,imx214.txt4 an active array size of 4224H x 3200V. It is programmable through an I2C
6 Image data is sent through MIPI CSI-2, through 2 or 4 lanes at a maximum
Dimx274.txt4 an active array size of 3864H x 2202V. It is programmable through I2C
6 Image data is sent through MIPI CSI-2, which is configured as 4 lanes
/Documentation/devicetree/bindings/interconnect/
Dqcom,sdm845.txt4 SDM845 interconnect providers support system bandwidth requirements through
6 able to communicate with the BCM through the Resource State Coordinator (RSC)
/Documentation/security/
DIMA-templates.rst34 by the ``|`` character) through the ``ima_template_fmt`` kernel command line
42 descriptor chosen through the kernel configuration or through the newly
95 - specify a template descriptor name from the kernel command line through
97 - register a new template descriptor with custom format through the kernel
/Documentation/fault-injection/
Dnotifier-error-inject.rst16 This feature is controlled through debugfs interface
35 This feature is controlled through debugfs interface
53 This feature is controlled through debugfs interface
66 This feature is controlled through debugfs interface
/Documentation/devicetree/bindings/net/
Dxilinx_axienet.txt10 Management configuration is done through the AXI interface, while payload is
11 sent and received through means of an AXI DMA controller. This driver
52 required through the core's MDIO interface (i.e. always,
53 unless the PHY is accessed through a different bus).
/Documentation/leds/
Dleds-lm3556.rst26 LM3556 Flash can be controlled through sys/class/leds/flash/brightness file
54 LM3556 torch can be controlled through sys/class/leds/torch/brightness file.
77 Indicator pattern can be set through sys/class/leds/indicator/pattern file,
98 Indicator brightness can be controlled through
Dleds-blinkm.rst8 communicate through I2C. The default address of these modules is
9 0x09 but this can be changed through a command. By this you could
12 The device accepts RGB and HSB color values through separate commands.
/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml72 Panels receive video data through one or multiple connections. While
81 Some panels expose EDID information through an I2C-compatible
94 # Many display panels can be controlled through pins driven by GPIOs. The nature
134 # controller exposed through a control bus such as I2C or DSI. Others expose
135 # backlight control through GPIO, PWM or other signals connected to an external
/Documentation/media/uapi/v4l/
Ddev-mem2mem.rst36 properties are global to the device (i.e. changing something through one
37 file handle is visible through another file handle).
41 their codec parameters. This is done through codec controls.
/Documentation/i2c/
Dsmbus-protocol.rst95 The register is specified through the Comm byte::
106 device, from a designated register that is specified through the Comm
122 register is specified through the Comm byte. This is the opposite of
137 specified through the Comm byte.::
151 This command selects a device register (through the Comm byte), sends
164 designated register that is specified through the Comm byte. The amount
179 a device, to a designated register that is specified through the
195 This command selects a device register (through the Comm byte), sends
281 designated register that is specified through the Comm byte::
293 a device, to a designated register that is specified through the
/Documentation/gpu/
Dvkms.rst41 The currently proposed solution is to expose vkms configuration through
42 configfs. All existing module options should be supported through configfs too.
102 any explicit form through e.g. possible property values. Userspace can only
103 inquiry about these limits through the atomic IOCTL, possibly using the
/Documentation/devicetree/
Dchangesets.txt4 through applying the changeset, then the tree will be rolled back to the
27 through locking. An unlocked version __of_changeset_apply is available,
/Documentation/networking/device_drivers/freescale/dpaa2/
Dethernet-driver.rst29 All hardware resources are allocated and configured through the Management
31 and exposes ABIs through which they can be configured and controlled. A few
108 Frames are transmitted and received through hardware frame queues, which can be
128 DPNIs are decoupled from PHYs; a DPNI can be connected to a PHY through a DPMAC
129 object or to another DPNI through an internal link, but the connection is
161 added to a container on the MC bus in one of two ways: statically, through a
169 The checksum offloads can be independently configured on RX and TX through
185 non-standard driver stats can be consulted through ethtool -S option.

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