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/Documentation/devicetree/bindings/power/
Drockchip-io-domain.txt4 IO domain voltages on some Rockchip SoCs are variable but need to be
9 - If the regulator hooked up to a pin like SDMMC0_VDD is 3.3V then
10 bit 7 of GRF_IO_VSEL needs to be 0. If the regulator hooked up to
11 that same pin is 1.8V then bit 7 of GRF_IO_VSEL needs to be 1.
15 hooked up to the pins.
18 - any logic for deciding what voltage we should set regulators to
48 - rockchip,grf: phandle to the syscon managing the "general register files"
49 Systems should move the io-domains to a sub-node of the grf simple-mfd.
53 to report their voltage. The IO Voltage Domain for any non-specified
57 - vccio6-supply: The supply connected to VCCIO6.
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/Documentation/networking/
Doperstates.txt6 <dev> up or down" and reflects whether the administrator wants to use
10 - ethernet requires to be plugged into the switch and, depending on
12 to be performed before user data can be transferred. Operational state
13 shows the ability of an interface to transmit this user data.
15 Thanks to 802.1X, userspace must be granted the possibility to
16 influence operational state. To accommodate this, operational state is
25 operation RTM_GETLINK. It is also possible to subscribe to RTNLGRP_LINK
26 to be notified of updates while the interface is admin up. This is
36 flag to determine whether they should use the interface.
54 Interface is unable to transfer data on L1, f.e. ethernet is not
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Dppp_generic.txt12 * the interface to the networking code
15 * the interface to pppd, via a /dev/ppp character device
23 mechanism for transporting PPP frames from one machine to another. A
26 to be able to send PPP frames, receive PPP frames, and optionally
31 This architecture makes it possible to implement PPP multilink in a
32 natural and straightforward way, by allowing more than one channel to
33 be linked to each ppp network interface unit. The generic layer is
42 functions used to communicate between the generic PPP layer and PPP
45 Each channel has to provide two functions to the generic PPP layer,
48 * start_xmit() is called by the generic layer when it has a frame to
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Dz8530book.rst12 core interface layer that is designed to make it easy to provide WAN
16 asynchronous driver support into this code to allow any Z85x30 device to
24 three different modes. Each mode can be applied to an individual channel
28 chip is interface to the I/O and interrupt facilities of the host
29 machine but not to the DMA subsystem. When running PIO the Z8530 has
31 Z85230 will be tricky. Typically you should expect to achieve at best
34 The DMA mode supports the chip when it is configured to use dual DMA
35 channels on an ISA bus. The better cards tend to support this mode of
37 when it starts to hit ISA DMA constraints at about 512Kbits. It is worth
39 fast enough to hold the ISA bus solid.
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Ddecnet.txt13 Be sure to turn on the following options:
16 CONFIG_PROC_FS (to see what's going on)
19 if you want to try out router support (not properly debugged yet)
22 CONFIG_DECNET_ROUTER (to be able to add/delete routes)
26 that you need it, in general you won't and it can cause ifconfig to
30 want to configure an endnode, then the simplified procedure is as follows:
37 to set the MAC address, see the next section. Also all configurations which
45 which is that its added to the addresses on the loopback device.
48 were added to the loopback device. In 2.5, any local interface address
49 can be used to loop back to the local machine. Of course this does not
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/Documentation/filesystems/
Dxfs-delayed-logging-design.txt4 Introduction to Re-logging in XFS
9 logged are made up of the changes to in-core structures rather than on-disk
11 logged. The reason for these differences is to reduce the amount of log space
18 modifications to a single object to be carried in the log at any given time.
19 This allows the log to avoid needing to flush each change to disk before
20 recording a new change to the object. XFS does this via a method called
22 new change to the object is recorded with a *new copy* of all the existing
23 changes in the new transaction that is written to the log.
25 That is, if we have a sequence of changes A through to F, and the object was
26 written to disk after change D, we would see in the log the following series
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/Documentation/bpf/
Dprog_cgroup_sysctl.rst10 The hook has to be attached to a cgroup and will be called every time a
11 process inside that cgroup tries to read from or write to sysctl knob in proc.
16 ``BPF_CGROUP_SYSCTL`` attach type has to be used to attach
17 ``BPF_PROG_TYPE_CGROUP_SYSCTL`` program to a cgroup.
22 ``BPF_PROG_TYPE_CGROUP_SYSCTL`` provides access to the following context from
34 or written. This field is read-write. Writing to the field sets the starting
36 will be writing to. Writing zero to the field can be used e.g. to override
39 value to the field can be used to access part of sysctl value starting from
41 0``, e.g. writes to numeric sysctl entries must always be at file position
52 * ``0`` means "reject access to sysctl";
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/Documentation/process/
D7.AdvancedTopics.rst7 works. There is still more to learn, however! This section will cover a
8 number of topics which can be helpful for developers wanting to become a
16 application. While BitKeeper was controversial, the approach to software
19 project. In current times, there are several free alternatives to
26 still being civilized by its developers. This document will not attempt to
27 teach the reader how to use git; that would be sufficient material for a
30 wish to come up to speed with git will find more information at:
38 The first order of business is to read the above sites and get a solid
39 understanding of how git works before trying to use it to make patches
40 available to others. A git-using developer should be able to obtain a copy
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D6.Followthrough.rst9 developers can make is to conclude that their work is now done. In truth,
11 with, possibly, quite a bit of work yet to be done.
16 code. You, as the author of that code, will be expected to work with the
17 kernel community to ensure that your code is up to the kernel's quality
18 standards. A failure to participate in this process is quite likely to
32 value and why you went to the trouble of writing it. But that value
34 like to maintain a kernel with this code in it five or ten years later?
35 Many of the changes you may be asked to make - from coding style tweaks
36 to substantial rewrites - come from the understanding that Linux will
44 impulse to respond in kind. Code review is about the code, not about
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D3.Early-stage.rst7 to jump right in and start coding. As with any significant project,
17 clear description of the problem to be solved. In some cases, this step is
19 example. In others, though, it is tempting to confuse the real problem
20 with the proposed solution, and that can lead to difficulties.
23 sought a way to run applications without dropouts or other artifacts caused
25 kernel module intended to hook into the Linux Security Module (LSM)
26 framework; this module could be configured to give specific applications
27 access to the realtime scheduler. This module was implemented and sent to
30 To the audio developers, this security module was sufficient to solve their
31 immediate problem. To the wider kernel community, though, it was seen as a
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/Documentation/block/
Dinline-encryption.rst10 We want to support inline encryption (IE) in the kernel.
11 To allow for testing, we also want a crypto API fallback when actual
12 IE hardware is absent. We also want IE to work with layered devices
13 like dm and loopback (i.e. we want to be able to use the IE hardware
14 of the underlying devices if present, or else fall back to crypto API
23 One can specify a keyslot in a data request made to the device, and the
25 that specified keyslot. When possible, we want to make multiple requests with
28 - We need a way for filesystems to specify an encryption context to use for
29 en/decrypting a struct bio, and a device driver (like UFS) needs to be able
30 to use that encryption context when it processes the bio.
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/Documentation/driver-api/pm/
Dcpuidle.rst21 Every time one of the logical CPUs in the system (the entities that appear to
24 there are no tasks to run on it except for the special "idle" task associated
25 with it, there is an opportunity to save energy for the processor that it
26 belongs to. That can be done by making the idle logical CPU stop fetching
31 situation in principle, so it may be necessary to find the most suitable one
32 (from the kernel perspective) and ask the processor to use (or "enter") that
40 units: *governors* responsible for selecting idle states to ask the processor
41 to enter, *drivers* that pass the governors' decisions on to the hardware and
49 one of the logical CPUs in the system turns out to be idle. Its role is to
50 select an idle state to ask the processor to enter in order to save some energy.
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/Documentation/admin-guide/LSM/
DSafeSetID.rst4 SafeSetID is an LSM module that gates the setid family of syscalls to restrict
5 UID/GID transitions from a given UID/GID to only those approved by a
8 allowing a user to set up user namespace UID mappings.
14 to switch to a different user must be spawned with CAP_SETUID privileges.
15 CAP_SETUID is granted to programs running as root or those running as a non-root
17 often preferable to use Linux runtime capabilities rather than file
18 capabilities, since using file capabilities to run a program with elevated
19 privileges opens up possible security holes since any user with access to the
20 file can exec() that program to gain the elevated privileges.
22 While it is possible to implement a tree of processes by giving full
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/Documentation/admin-guide/pm/
Dcpufreq.rst20 different clock frequency and voltage configurations, often referred to as
29 In some situations it is desirable or even necessary to run the program as fast
30 as possible and then there is no reason to use any P-states different from the
32 available). In some other cases, however, it may not be necessary to execute
35 It also may not be physically possible to maintain maximum CPU capacity for too
36 long for thermal or power supply capacity reasons or similar. To cover those
37 cases, there are hardware interfaces allowing CPUs to be switched between
38 different frequency/voltage configurations or (in the ACPI terminology) to be
41 Typically, they are used along with algorithms to estimate the required CPU
42 capacity, so as to decide which P-states to put the CPUs into. Of course, since
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Dcpuidle.rst19 Modern processors are generally able to enter states in which the execution of
20 a program is suspended and instructions belonging to it are not fetched from
24 generally allows power drawn by the processor to be reduced and, in consequence,
25 it is an opportunity to save energy.
36 not be separate physical entities and may just be interfaces appearing to
38 entity which appears to be fetching instructions that belong to one sequence
43 program) at a time, it is a CPU. In that case, if the hardware is asked to
44 enter an idle state, that applies to the processor as a whole.
46 Second, if the processor is multi-core, each core in it is able to follow at
51 time. The entire cores are CPUs in that case and if the hardware is asked to
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Dsleep-states.rst22 the Linux kernel can support up to four system sleep states, including
23 hibernation and up to three variants of system suspend. The sleep states that
28 Suspend-to-Idle
32 referred to as S2I or S2Idle). It allows more energy to be saved relative to
39 any devices that can cause interrupts to be generated in the working state can
43 or :ref:`suspend-to-RAM <s2ram>`, or it can be used in addition to any of the
44 deeper system suspend variants to provide reduced resume latency. It is always
53 providing a relatively straightforward transition back to the working state. No
55 go back to where it left off easily enough.
57 In addition to freezing user space, suspending the timekeeping and putting all
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/Documentation/devicetree/bindings/spi/
Dspi-sprd-adi.txt3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
5 framework for its hardware implementation is alike to SPI bus and its timing
6 is compatile to SPI timing.
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
11 we can configure them to allow other hardware components to use it independently,
12 which means we can just link one analog chip address to one hardware channel,
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
17 channels, the first value specifies the hardware channel id which is used to
19 the analog chip address where user want to access by hardware components.
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/Documentation/driver-api/dmaengine/
Dprovider.rst11 They have a given number of channels to use for the DMA transfers, and
15 to serve several to any requests. To simplify, channels are the
19 The request lines actually correspond to physical lines going from the
20 DMA-eligible devices to the controller itself. Whenever the device
21 will want to start a transfer, it will assert a DMA request (DRQ) by
26 byte of data from one buffer to another, until the transfer size has
30 require a specific number of bits to be transferred in a single
31 cycle. For example, we may want to transfer as much data as the
32 physical bus allows to maximize performances when doing a simple
34 that requires data to be written exactly 16 or 24 bits at a time. This
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/Documentation/scsi/
DChangeLog.lpfc5 Changes from 20050323 to 20050413
7 * Changed version number to 8.0.28
10 * Removed pci dma sync calls to coherent/consistent pci memory.
13 * Removed sysfs attributes that are used to dump the various
17 to luns on nodes in NPR or other relevant states (PLOGI,
23 * Removed extraneous calls to lpfc_sli_next_iotag which should
29 if we timed out waiting for command to complete after abort was
31 * Zero-out response sense length in lpfc_scsi_prep_cmnd to prevent
45 driver has already returned the command to the midlayer.
47 Changes from 20050308 to 20050323
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/Documentation/
DDMA-attributes.txt12 to a memory region with the DMA_ATTR_WRITE_BARRIER attribute forces
13 all pending DMA writes to complete, and thus provides a mechanism to
15 bridges. This barrier is not specific to a particular type of
16 interconnect, it applies to the system as a whole, and so its
18 the way from the DMA device to memory.
21 useful, suppose that a device does a DMA write to indicate that data is
29 DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
32 Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
39 DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
40 buffered to improve performance.
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/Documentation/firmware-guide/acpi/
Dosi.rst8 to find out what the operating system supports. Eg. If BIOS
10 can evaluate that method, look to see if it supports 'XYZ'
11 and answer YES or NO to the BIOS.
19 How to use _OSI
23 to be compatible with Linux, and those that were never tested with Linux,
24 but where Linux was installed to replace the original OS (Windows or OSX).
26 The larger group is the systems tested to run only Windows. Not only that,
27 but many were tested to run with just one specific version of Windows.
28 So even though the BIOS may use _OSI to query what version of Windows is running,
31 exposes Linux to an entire category of BIOS bugs.
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/Documentation/filesystems/caching/
Dbackend-api.txt5 The FS-Cache system provides an API by which actual caches can be supplied to
6 FS-Cache for it to then serve out to network filesystems and other interested
16 To start off, a cache definition must be initialised and registered for each
17 cache the backend wants to make available. For instance, CacheFS does this in
29 (*) "cache" is a pointer to the cache definition;
31 (*) "ops" is a pointer to the table of operations that the backend supports on
38 The cache should then be registered with FS-Cache by passing a pointer to the
39 previously initialised cache definition to:
47 (*) "fsdef" which should point to the object representation for the FS-Cache
49 here. FS-Cache keeps the caller's reference to the index object if
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/Documentation/driver-api/
Ddevice_link.rst17 Sometimes there is a need to represent device dependencies beyond the
22 dependencies, i.e. that one device must be bound to a driver before
26 another one both with regards to driver presence *and* with regards to
35 supplier is bound to a driver, and they're unbound before the supplier
45 is instructed to runtime resume the supplier and keep it active
55 It is legal to add them later, but care must be taken that the system
58 such a transition needs to be prevented with :c:func:`lock_system_sleep()`,
59 or the device link needs to be added from a function which is guaranteed
60 not to run in parallel to a suspend/resume transition, such as from a
65 ``->probe`` callback while the supplier hasn't started to probe yet: Had the
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/Documentation/driver-api/gpio/
Ddrivers-on-gpio.rst10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
14 i.e. a LED will turn on/off in response to a GPIO line going high or low
18 can generate interrupts in response to a key press. Also supports debounce.
21 GPIO line cannot generate interrupts, so it needs to be periodically polled
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
25 up to three buttons by simply using GPIOs and no mouse port. You can cut the
26 mouse cable and connect the wires to GPIO lines or solder a mouse connector
27 to the lines for a more permanent solution of this type.
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
30 an external speaker connected to a GPIO line.
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/Documentation/ABI/testing/
Dconfigfs-spear-pcie-gadget7 Interface is used to configure selected dual mode PCIe controller
8 as device and then program its various registers to configure it
10 This interfaces can be used to show spear's PCIe device capability.
12 Nodes are only visible when configfs is mounted. To mount configfs
18 link ... used to enable ltssm and read its status.
19 int_type ...used to configure and read type of supported
21 no_of_msi ... used to configure number of MSI vector needed and
22 to read no of MSI granted.
23 inta ... write 1 to assert INTA and 0 to de-assert.
24 send_msi ... write MSI vector to be sent.
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