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/Documentation/devicetree/bindings/arm/amlogic/
Danalog-top.txt1 Amlogic Meson8 and Meson8b "analog top" registers:
4 The analog top registers contain information about the so-called
8 - reg: the register range of the analog top registers
10 - "amlogic,meson8-analog-top"
11 - "amlogic,meson8b-analog-top"
17 analog_top: analog-top@81a8 {
18 compatible = "amlogic,meson8-analog-top", "syscon";
/Documentation/media/uapi/v4l/
Dfield-order.rst36 combine to frames. We distinguish between top (aka odd) and bottom (aka
37 even) fields, the *spatial order*: The first line of the top field is
42 whether a frame commences with the top or bottom field is pointless. Any
43 two successive top and bottom, or bottom and top fields yield a valid
48 Counter to intuition the top field is not necessarily the older field.
49 Whether the older field contains the top or bottom lines is a convention
55 bus in the same order they were captured, so if the top field was
56 captured first (is the older field), the top field is also transmitted
99 - Images consist of the top (aka odd) field only.
109 order of the fields (whether the top or bottom field is older)
[all …]
Dselection-api-configuration.rst37 The range of coordinates of the top left corner, width and height of
39 target. It is recommended for the driver developers to put the top/left
43 The top left corner, width and height of the source rectangle, that is
58 coordinates are expressed in pixels. The rectangle's top/left corner
98 All coordinates are expressed in pixels. The top/left corner is always
102 The top left corner, width and height of the source rectangle, that is
124 the driver developers to put the top/left corner at position ``(0,0)``.
Dpixfmt-intro.rst34 are always arranged in memory from left to right, and from top to
37 immediately to its right, and so on until the end of the top row of
41 leftmost pixel of the second row from the top, and so on. The last row
Dext-ctrls-detect.rst65 top-left of the grid.
71 top-left of the grid.
/Documentation/admin-guide/cifs/
Dwinucase_convert.pl28 $top[$firstchar][$secondchar] = $uppercase;
32 next if (!$top[$i]);
41 printf("0x%4.4x,", $top[$i][$j] ? $top[$i][$j] : 0);
50 } elsif ($top[$i]) {
56 if ($top[$i]) {
/Documentation/devicetree/bindings/sound/
Dimg,pistachio-internal-dac.txt7 - img,cr-top : Must contain a phandle to the top level control syscon
16 img,cr-top = <&cr_top>;
/Documentation/devicetree/bindings/display/
Damlogic,meson-dw-hdmi.yaml16 - A TOP control block controlling the Clocks and PHY
19 | HDMI TOP |<= HPD
26 The HDMI TOP block only supports HPD sensing.
28 TOP Block interrupt.
29 Communication to the TOP Block and the Synopsys HDMI Controller is done
37 The VENC uses a DVI encoder on top of the ENCI or ENCP encoders to generate
/Documentation/devicetree/bindings/clock/
Dpistachio-clock.txt5 general control, and top general control) which are instantiated individually
31 top-level general control.
99 Top-level general control:
102 The top-level general control block contains miscellaneous control registers and
106 - compatible: Must include "img,pistachio-cr-top" and "syscon".
107 - reg: Must contain the base address and length of the top-level
117 compatible = "img,pistachio-cr-top", "syscon";
/Documentation/sound/designs/
Dchannel-mapping-api.rst108 SNDRV_CHMAP_TC, /* top center */
109 SNDRV_CHMAP_TFL, /* top front left */
110 SNDRV_CHMAP_TFR, /* top front right */
111 SNDRV_CHMAP_TFC, /* top front center */
112 SNDRV_CHMAP_TRL, /* top rear left */
113 SNDRV_CHMAP_TRR, /* top rear right */
114 SNDRV_CHMAP_TRC, /* top rear center */
/Documentation/devicetree/bindings/pwm/
Dpwm-mediatek.txt17 - "top": the top clock generator
38 clock-names = "top", "main", "pwm1", "pwm2",
/Documentation/devicetree/bindings/ata/
Dbrcm,sata-brcm.txt14 - reg-names : "ahci" and "top-ctrl"
24 reg-names = "ahci", "top-ctrl";
/Documentation/devicetree/bindings/mmc/
Dsdhci-st.txt26 contain the FlashSS Top register for TX/RX delay used by the driver
31 - reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
96 reg-names = "mmc", "top-mmc-delay";
/Documentation/devicetree/bindings/phy/
Dpistachio-usb-phy.txt11 - img,cr-top: Must constain a phandle to the CR_TOP syscon node.
27 img,cr-top = <&cr_top>;
/Documentation/media/v4l-drivers/
Dsh_mobile_ceu_camera.rst51 S_CROP(left / top = (5) - (1), width / height = (5') - (5))
57 (1) to (2) - sensor cropped left or top
60 (3) to (4) - CEU cropped left or top
63 (2) to (5) - reverse sensor scale applied to CEU cropped left or top
Dpvrusb2.rst45 The most important shearing layer is between the top 2 layers. A
47 conceivable API can be laid on top of the core driver. (Yes, the
166 pvrusb2-ioread.[ch] - This module layers on top of pvrusb2-io.[ch]
168 I/O. Right now this is the only layer on top of pvrusb2-io.[ch],
173 pvrusb2-main.c - This is the top level of the driver. Module level
/Documentation/locking/
Drt-mutex-design.rst116 top waiter
119 top pi waiter
173 also call it the Top of the chain) must be equal to or higher in priority
209 a tree of all top waiters of the mutexes that are owned by the process.
210 Note that this tree only holds the top waiters and not all waiters that are
213 The top of the task's PI tree is always the highest priority task that
216 at the top of this tree.
358 the pi_waiters of a task holds an order by priority of all the top waiters
359 of all the mutexes that the task owns, we simply need to compare the top
377 by the task, so we only need to compare the priority of that top pi waiter
[all …]
Drt-mutex.rst34 rtmutex, only the top priority waiter is enqueued into the owner's
36 the top priority waiter of a task changes (for example it timed out or
56 NULL 1 lock is free and has waiters and the top waiter
/Documentation/ABI/testing/
Dsysfs-platform-brcmstb-gisb-arb7 Broadcom Set Top Box internal GISB bus arbiter. Minimum value
/Documentation/driver-api/iio/
Dtriggered-buffers.rst56 * **sensor_iio_pollfunc**, the function that will be used as top half of poll
65 top half.
/Documentation/devicetree/bindings/media/i2c/
Dths8200.txt4 recorders, set-top boxes.
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-zx.txt12 DVI1_HS ---+----------------------------- GMII_RXD3 (TOP pin)
38 'TOP pins'. For pins like KEY_ROW2, the pinmux is controlled by both
/Documentation/devicetree/bindings/
Djailhouse.txt5 platform shall have a top-level "hypervisor" node with the following
/Documentation/arm/sti/
Dstih416-overview.rst8 The STiH416 is the next generation of HD, AVC set-top box processors
Dstih415-overview.rst8 The STiH415 is the next generation of HD, AVC set-top box processors

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