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/Documentation/powerpc/
Dpci_iov_resource_on_powernv.rst59 Each window can be configured to be remapped via a "TCE table" (IOMMU
76 window and sixteen M64 windows. They have different characteristics.
81 - The M32 window:
87 32-bit PCIe accesses. We configure that window at boot from FW and
97 to be assigned to PEs on a segment granularity. For a 2GB window,
100 Now, this is the "main" window we use in Linux today (excluding
119 specify the PE# for the entire window. When segmented, a window
124 there's a defined ordering for which window applies.
129 We configure an M64 window to cover the entire region of address space
188 - M32 window: There's one M32 window, and it is split into 256
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/Documentation/devicetree/bindings/bus/
Dmvebu-mbus.txt20 the second cell for the address offset within the window.
30 within the internal register window (see below).
52 the first one controls the devices decoding window,
53 the second one controls the SDRAM decoding window and
80 ** MBus address decoding window specification
83 the window ID and the second one for the offset within the window.
84 In order to allow to describe valid and non-valid window entries, the
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
96 I = 4-bit window target ID
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/Documentation/media/v4l-drivers/
Dsh_mobile_ceu_camera.rst64 (6) to (6') - CEU scale - user window
77 current sensor scales onto input window - this is user S_CROP:
81 3. Calculate new combined scales from "effective" input window to requested user
82 window:
86 4. Calculate sensor output window by applying combined scales to real input
87 window:
91 5. Apply iterative sensor S_FMT for sensor output window.
95 6. Retrieve sensor output window (g_fmt)
107 9. Use CEU cropping to crop to the new window:
111 10. Use CEU scaling to scale to the requested user window:
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Dsoc-camera.rst121 VIDIOC_S_CROP: sets location and sizes of the sensor window. Unit is one sensor
122 pixel. Changing sensor window sizes preserves any scaling factors, therefore
123 user window sizes change as well.
125 VIDIOC_S_FMT: sets user window. Should preserve previously set sensor window as
126 much as possible by modifying scaling factors. If the sensor window cannot be
142 .s_fmt() and .try_fmt() have to be implemented too. Sensor window and scaling
150 User window geometry is kept in .user_width and .user_height fields in struct
Dvimc.rst96 Window size to calculate the mean. Note: the window size needs to be an
97 odd number, as the main pixel stays in the center of the window,
/Documentation/driver-api/
Dntb.rst40 mainly used to perform the proper memory window initialization. Typically
41 there are two types of memory window interfaces supported by the NTB API:
55 So typical scenario of the first type memory window initialization looks:
58 maps corresponding outbound memory window so to have access to the shared
76 outbound memory window so to have access to the shared memory region.
82 1) Allocate memory for a shared window
83 2) Initialize memory window by translated address of the allocated region
84 (it may fail if local memory window initialization is unsupported)
85 3) Send the translated address and memory window index to a peer device
88 1) Initialize memory window with retrieved address of the allocated
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Dvme.rst62 driver to request a specific window or DMA channel (which may be used by a
69 attributes can be requested for a single window, the core will assign a window
75 transfers as well as test pattern generation. If an unallocated window fitting
78 Functions are also provided to free window allocations once they are no longer
89 the underlying chipset. A window must be configured before it can be used.
92 Master window configuration
95 Once a master window has been assigned :c:func:`vme_master_set` can be used to
102 Master window access
109 do a read-modify-write transaction. Parts of a VME window can also be mapped
118 used is dependent on the underlying chipset. A window must be configured before
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/Documentation/devicetree/bindings/security/tpm/
Dibmvtpm.txt14 encode the physical address field of dma-window
17 encode the size field of dma-window properties
18 - ibm,my-dma-window : specifies DMA window associated with this virtual
37 ibm,my-dma-window = <0x10000003 0x0 0x0 0x0 0x10000000>;
/Documentation/accounting/
Dpsi.rst73 time window, e.g. 100ms of total stall time within any 500ms window to
78 desired threshold and time window. The open file descriptor should be
82 <some|full> <stall amount in us> <time window in us>
86 1sec time window. Writing "full 50000 1000000" into /proc/pressure/io
87 would add 50ms threshold for full io stall measured within 1sec time window.
98 tracking window.
100 The kernel accepts window sizes ranging from 500ms to 10s, therefore min
107 tracking window to avoid repeated activations/deactivations when system is
110 Notifications to the userspace are rate-limited to one per tracking window.
128 * Monitor memory partial stall with 1s tracking window size
/Documentation/trace/
Dhwlat_detector.rst51 must be less than the total window size (enforced)
52 - window - total period of sampling, width being inside (usecs)
54 By default the width is set to 500,000 and window to 1,000,000, meaning that
61 is less than 1 millisecond apart from window, to allow the system to not
77 - hwlat_detector/width - specified amount of time to spin within window (usecs)
78 - hwlat_detector/window - amount of time between (width) runs (usecs)
81 tracing_cpumask between each window. To limit the migration, either modify
/Documentation/devicetree/bindings/powerpc/
Dibm,vas.txt11 window context start and length, OS/User window context start and length,
12 "Paste address" start and length, "Paste window id" start bit and number
/Documentation/ABI/testing/
Dsysfs-bus-intel_th-devices-msc28 of numbers of pages for each window to be allocated. Number of
38 Description: (RW) Trigger window switch for the MSC's buffer, in
39 multi-window mode. In "multi" mode, accepts writes of "1", thereby
40 triggering a window switch for the buffer. Returns an error in any
Dsysfs-class-powercap101 the time window specified by "constraint_X_time_window_us".
109 Time window in micro seconds. This is used along with
135 Maximum allowed time window in micro seconds for this
143 Minimum allowed time window in micro seconds for this
/Documentation/devicetree/bindings/iommu/
Diommu.txt56 - #iommu-cells = <4>: Some IOMMU devices allow the DMA window for masters to
59 the DMA window for the given device. The length of the DMA window is given
162 Multiple-master IOMMU with configurable DMA window:
169 * address of the DMA window. The length of the DMA
170 * window is encoded in two cells.
172 * The DMA window is the range addressable by the
179 /* master ID 42, 4 GiB DMA window starting at 0 */
Dnvidia,tegra30-smmu.txt9 - dma-window : IOVA start address and length.
19 dma-window = <0 0x40000000>; /* IOVA start & length */
/Documentation/media/uapi/v4l/
Ddev-overlay.rst24 video into a window.
119 Overlay Window
122 The overlaid image is determined by cropping and overlay window
128 The overlay window is described by a struct
138 To program the overlay window applications set the ``type`` field of a
153 prohibits different image and window sizes, the size requested first
165 Size and position of the window relative to the top, left corner of
167 :ref:`VIDIOC_S_FBUF <VIDIOC_G_FBUF>`. The window can extend the
170 driver clips the window accordingly, or if that is not possible,
196 Like the window coordinates w, clipping rectangles are defined
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/Documentation/devicetree/bindings/pci/
Dmobiveil-pcie.txt23 1. Config window
24 2. Memory window
26 default 1 inbound memory window is configured.
Ddesignware-pcie-ecam.txt4 PCIe controller in RC mode with static ATU window mappings that cover all
10 In cases where the IP was synthesized with a minimum ATU window size of
/Documentation/devicetree/bindings/timer/
Darm,twd.txt20 register window.
45 register window.
/Documentation/devicetree/bindings/powerpc/fsl/
Dmsi-pic.txt94 In the PAMU, each PCI controller is given only one primary window. The
95 PAMU restricts DMA operations so that they can only occur within a window.
96 Because PCI devices must be able to DMA to memory, the primary window must
107 primary window used for memory, but mapped to the MSIR block (where MSIIR
/Documentation/networking/
Dproc_net_tcp.txt31 | | | | | | | | |----> sending congestion window
39 | |----------------------------------> unanswered 0-window probes
48 4 zero window probe timer is pending
/Documentation/process/
D2.Process.rst37 cycle, the "merge window" is said to be open. At that time, code which is
45 merge window do not come out of thin air; they have been collected, tested,
49 The merge window lasts for approximately two weeks. At the end of this
50 time, Linus Torvalds will declare that the window is closed and release the
52 for example, the release which happens at the end of the merge window will
60 features outside of the merge window tend to get an unfriendly reception.
61 As a general rule, if you miss the merge window for a given feature, the
78 February 11 4.16-rc1, merge window closes
100 worse; the pile of changes waiting for the next merge window will grow
240 When the merge window opens, top-level maintainers will ask Linus to "pull"
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/Documentation/devicetree/bindings/mmc/
Dfsl-imx-esdhc.txt27 to select a proper data sampling window in case the clock quality is not good
40 tuning step can't find the proper delay window within limited tuning retries.
/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt111 the mbus address decoding window for each of its child devices.
112 The window is created using the chip select specified in the child
114 property. For instance, in the example below the allocated decoding window
118 This address window handling is done in this mvebu-devbus only as a temporary
/Documentation/RCU/Design/Memory-Ordering/
Drcu_node-lock.svg61 inkscape:window-width="1087"
62 inkscape:window-height="1144"
68 inkscape:window-x="833"
69 inkscape:window-y="28"
70 inkscape:window-maximized="0"

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